background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

PD0_PWMH1_ADR20

P

J

4

_

D

A

T

A

1

2

P

K

4

_

n

C

S

2

P

K

1

_

n

B

L

E

N

GND

P

J

2

_

D

A

T

A

1

0

P

D

3

_

D

E

1

_

A

D

R

1

6

P

J

7

_

D

A

T

A

1

5

PF5_ADR5

PF0_ADR0

P

K

7

_

n

C

S

5

GND

P

A

2

_

D

E

0

PA0_T0IN

G

N

D

P

B

1

_

_

A

N

A

1

_

T

0

IN

1

PD1_PWML1_ADR21

P

J

1

_

D

A

T

A

9

P

K

2

_

n

C

S

0

P

A

5

_

T

X

D

0

P

C

5

_

M

IS

O

VCC_33v

PE3_DATA3

P

B

0

_

_

A

N

A

0

_

T

0

IN

0

PF1_ADR1

V

C

C

_

3

3

v

P

K

3

_

n

C

S

1

PE0_DATA0

P

A

1

_

T

0

O

U

T

P

B

4

_

_

A

N

A

4

P

C

4

_

M

O

S

I

P

J

0

_

D

A

T

A

8

-RESET

P

A

4

_

R

X

D

0

P

F

7

_

A

D

R

7

P

H

1

_

A

N

A

9

_

n

R

D

PF6_ADR6

PE4_DATA4

P

B

5

_

_

A

N

A

5

PF2_ADR2

P

H

2

_

A

N

A

1

0

PE1_DATA1

V

C

C

_

3

3

v

P

H

0

_

A

N

A

8

_

n

W

R

P

D

5

_

T

X

D

1

_

A

D

R

1

9

P

J

6

_

D

A

T

A

1

4

P

B

3

_

_

A

N

A

3

_

O

P

O

U

T

V

C

C

_

3

3

V

PF3_ADR3

G

N

D

V

C

C

_

3

3

v

P

J

3

_

D

A

T

A

1

1

PC2_nSS

G

N

D

P

K

5

_

n

C

S

3

P

H

3

_

A

N

A

1

1

_

C

P

IN

P

_

n

W

A

IT

P

D

4

_

R

X

D

1

_

A

D

R

1

8

P

J

5

_

D

A

T

A

1

3

P

K

0

_

n

B

H

E

N

GND

PE2_DATA2

P

B

6

_

A

N

A

6

_

O

P

IN

P

V

C

C

_

3

3

v

PF4_ADR4

P

K

6

_

n

C

S

4

P

B

2

_

_

A

N

A

2

_

T

0

IN

2

VCC_33v

PD2_PWMH2_ADR22

P

A

3

_

n

C

T

S

0

P

B

7

_

A

N

A

7

_

O

P

IN

N

PC1_TOUT

PC1

PC3_SCK

PC3

PC0_T1IN

PA6_SCL
PA7_SDA

PC4_MOSI

PC4

PA4_RXD0

PA3_nCTS0

PA5_TXD0

PC5_MISO

PC5

PA1_T0OUT

PC2_nSS

PC2

PK5_nCS3

PK5

PK7_nCS5

PK7

PK0_nBHEN

PK0

PK6_nCS4

PK6

PK4_nCS2

PK4

PK2_nCS0

PK2

PK1_nBLEN

PK1

PH3_ANA11_CPINP_nWAIT

ANA11

PH2_ANA10

ANA10

PK3_nCS1

PK3

PF4_ADR4

A4

PJ2_DATA10

D10

PF2_ADR2

A2

PJ3_DATA11

D11

PE5_DATA5

D5

PJ0_DATA8

D8

PE1_DATA1

D1

PJ5_DATA13

D13

PG0_ADR8

A8

PE7_DATA7

D7

PE4_DATA4

D4

PG7_ADR15

A15

PF3_ADR3

A3

PF7_ADR7

A7

PE2_DATA2

D2

PF5_ADR5

A5

PJ6_DATA14

D14

PJ4_DATA12

D12

PG3_ADR11

A11

PE0_DATA0

D0

PJ1_DATA9

D9

PF6_ADR6

A6

PG4_ADR12

A12

PG5_ADR13

A13

PE3_DATA3

D3

PG1_ADR9

A9

PG6_ADR14

A14

PE6_DATA6

D6

PJ7_DATA15

D15

PG2_ADR10

A10

PF1_ADR1

A1

PF0_ADR0

A0

A20
A21
A22
A16
A18
A19
A17
A23

PD0_PWMH1_ADR20

PD3_DE1_ADR16
PD4_RXD1_ADR18

PD7_PWML2_ADR23

PD2_PWMH2_ADR22

PD6_nCTS1_ADR17

PD1_PWML1_ADR21

PD5_TXD1_ADR19

PD5_TXD1_ADR19

PD3_DE1_ADR16

PD2_PWMH2_ADR22

PD1_PWML1_ADR21

PD7_PWML2_ADR23

PD6_nCTS1_ADR17

PD0_PWMH1_ADR20

PD4_RXD1_ADR18

DE1

nCTS1

PWML1
PWMH2

TXD1

PWMH1

PWML2

RXD1

PC6_T2IN_PWMH0

PC6

PC7_T2OUT_PWML0

PC7

PH1_ANA9_nRD

PH0_ANA8_nWR

ANA_9
ANA_8

OPINP_CINN

V

R

E

F

A

G

N

D

ANA_5

CINP
OPOUT

ANA_M2
ANA_M1
ANA_M0

-MC_EN

Vref

AGND

ANA6
ANA11

ANA7

ANA1
ANA0

ANA2

PA0_T0IN

ANA_M1

ANA_M2

ANA_M0

VCC_33V

PB3__ANA3_OPOUT

ANA3

PB2__ANA2_T0IN2

ANA2

PB1__ANA1_T0IN1

ANA1

PB6_ANA6_OPINP

ANA6

PB4__ANA4

ANA4

PB5__ANA5

ANA5

ANA3

PB0__ANA0_T0IN0

ANA0

PB7_ANA7_OPINN

ANA7

PA2_DE0

A

V

C

C

-MC_EN

VCC_33V

GND

DBG

VCC_33V

-RESET

VCC_33V

VCC_33V

PC1_TOUT

PG6_ADR14

PD6_nCTS1_ADR17

PC0_T1IN

VCC_33v

PE5_DATA5

PG2_ADR10

PE7_DATA7

PG3_ADR11

DBG

GND

PC3_SCK

VCC_33v

PG0_ADR8

PE6_DATA6

PG5_ADR13

PG1_ADR9

PA6_SCL
PA7_SDA

PD7_PWML2_ADR23

PC6_T2IN_PWMH0

PG4_ADR12

PC7_T2OUT_PWML0

PG7_ADR15

GND

OPINN

PC0

ANA_5

ANA5

D[15:0]

A[23:0]

-WR

-RD

ANA[11:10]

ANA_M[2:0]

ANA_9
ANA_8

ANA[7:0]

PC[7:0]

PK[7:0]

-MC_EN

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

PWMH1
PWML1
PWMH2

PWML2

DE1

TXD1

RXD1

nCTS1

-XM_EN

VREF

-RESET

PC0_T1IN

VCC_33V

VCC_33V

Title

Size

Document Number

Rev

Date:

Sheet

of

96C0999-001

C

Z8F1285 Evaluation Module. Schematic.

B

2

4

Monday, May 08, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C0999-001

C

Z8F1285 Evaluation Module. Schematic.

B

2

4

Monday, May 08, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C0999-001

C

Z8F1285 Evaluation Module. Schematic.

B

2

4

Monday, May 08, 2006

DBG
INTERFACE

XM_OUT/MC_IN

MCU

C3

0.01uF

C3

0.01uF

C6

22pF

C6

22pF

R6
10K

R6
10K

U3

SN74CBTLV3861

U3

SN74CBTLV3861

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

B1

22

B2

21

B3

20

B4

19

B5

18

B6

17

B7

16

B8

15

B9

14

B10

13

NC

1

VCC

24

GND

12

OE

23

C4

12pF

C4

12pF

C22

0.01uF

C22

0.01uF

R5

49.9K

R5

49.9K

C9

0.01uF

C9

0.01uF

C21

0.01uF

C21

0.01uF

C20

0.01uF

C20

0.01uF

C2

0.1uF

C2

0.1uF

U2

Z8F1285_100QFP

U2

Z8F1285_100QFP

PA0/T0IN/OUT/DMA0REQ

1

PD2/PWMH2/ADR22

2

PC2/SS/CS4

3

PF6/ADR6

4

RESET

5

VDD

6

PF5/ADR5

7

PF4/ADR4

8

PF3/ADR3

9

PE3/DATA3

11

PE4/DATA4

10

GND

12

PE2/DATA2

13

PE1/DATA1

14

PE0/DATA0

15

GND

16

PF2/ADR2

17

PF1/ADR1

18

PF0/ADR0

19

VDD

20

PD1/PWML1/ADR21

21

PD0/PWMH1/ADR20

22

EXTAL

23

XTAL

24

P

A

1

/T

0

O

U

T

/D

M

A

0

C

K

9

5

PA6/SCL/CS3

75

PA7/SDA/CS4

74

GND

25

A

G

N

D

4

5

GND

51

A

V

D

D

3

1

P

H

0

/A

N

A

8

/W

R

3

2

P

H

1

/A

N

A

9

/R

D

3

3

P

B

0

/A

N

A

0

/T

0

IN

0

3

4

P

B

1

/A

N

A

1

/T

0

IN

1

3

5

P

B

4

/A

N

A

4

3

6

P

B

5

/A

N

A

5

3

7

P

B

6

/A

N

A

6

/O

P

IN

P

/C

IN

N

3

8

P

B

7

/A

N

A

7

/O

P

IN

N

3

9

P

B

3

/A

N

A

3

/O

P

O

U

T

4

0

P

B

2

/A

N

A

2

/T

0

IN

2

4

1

P

H

2

/A

N

A

1

0

/C

S

0

4

2

P

H

3

/A

N

A

1

1

/C

P

IN

P

/W

A

IT

4

3

V

R

E

F

4

4

PC0/T1IN/OUT/DMA1REQ/CINN

52

PC1/T1OUT/DMA1ACK/COUT

53

DBG

54

PC6/T2IN/OUT/PWMH0

55

PC7/T2OUT/PWML0

56

PG7/ADR15

57

VDD

58

PG6/ADR14

59

PG5/ADR13

60

PG4/ADR12

61

PG3/ADR11

62

PE7/DATA7

64

PE6/DATA6

65

PE5/DATA5

66

PG2/ADR10

67

PG1/ADR9

68

PG0/ADR8

70

PD7/PWML2/ADR23

71

PC3/SCK/DMA2REQ

72

PD6/CTS1/ADR17

73

P

A

5

/T

X

D

0

/C

S

2

7

6

P

A

4

/R

X

D

0

/C

S

1

7

7

P

C

4

/M

O

S

I/

D

M

A

2

A

C

K

8

5

P

D

5

/T

X

D

1

/A

D

R

1

9

8

6

P

D

4

/R

X

D

1

/A

D

R

1

8

8

7

P

D

3

/D

E

1

/A

D

R

1

6

8

8

P

C

5

/M

IS

O

/C

S

5

8

9

P

F

7

/A

D

R

7

9

0

P

A

3

/C

T

S

0

/F

A

U

L

T

0

9

3

P

A

2

/D

E

0

/F

A

U

L

T

Y

9

4

G

N

D

9

2

V

D

D

9

1

G

N

D

7

8

V

D

D

7

9

GND

69

VDD

63

P

K

3

/C

S

1

2

6

P

K

2

/C

S

0

2

7

P

K

1

/B

L

E

N

2

8

P

K

0

/B

H

E

N

2

9

V

D

D

3

0

P

K

4

/C

S

2

4

6

P

K

5

/C

S

3

4

7

P

K

6

/C

S

4

4

8

P

K

7

/C

S

5

4

9

V

D

D

5

0

P

J

7

/D

A

T

A

1

5

8

0

P

J

6

/D

A

T

A

1

4

8

1

P

J

5

/D

A

T

A

1

3

8

2

P

J

4

/D

A

T

A

1

2

8

3

G

N

D

8

4

P

J

3

/D

A

T

A

1

1

9

7

V

D

D

9

6

P

J

2

/D

A

T

A

1

0

9

8

P

J

1

/D

A

T

A

9

9

9

P

J

0

/D

A

T

A

8

1

0

0

R11

1K

R11

1K

R4

10K

R4

10K

P3

HDR/PIN 2x3

P3

HDR/PIN 2x3

1

2

3

4

5

6

C18

0.01uF

C18

0.01uF

C19

0.01uF

C19

0.01uF

J1

HDR/PIN 1x2

J1

HDR/PIN 1x2

1
2

R35
10K

R35
10K

C8

0.01uF

C8

0.01uF

+

C11

10uF

+

C11

10uF

C23

1000pF

C23

1000pF

C16

0.01uF

C16

0.01uF

U4A

SN74LVC04

U4A

SN74LVC04

1

2

1

4

7

C17

0.01uF

C17

0.01uF

C15

0.01uF

C15

0.01uF

R9

10K

R9

10K

R8

0 OHm

R8

0 OHm

C14

0.01uF

C14

0.01uF

C5

22pF

C5

22pF

U5

SN74CBTLV3861

U5

SN74CBTLV3861

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

B1

22

B2

21

B3

20

B4

19

B5

18

B6

17

B7

16

B8

15

B9

14

B10

13

NC

1

VCC

24

GND

12

OE

23

C12

0.01uF

C12

0.01uF

C1

100pF

C1

100pF

C13

0.01uF

C13

0.01uF

U1

SN74CBTLV3861

U1

SN74CBTLV3861

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

B1

22

B2

21

B3

20

B4

19

B5

18

B6

17

B7

16

B8

15

B9

14

B10

13

NC

1

VCC

24

GND

12

OE

23

R1

10K

R1

10K

R7

0 OHm

R7

0 OHm

Y1

20 MHz

Y1

20 MHz

1

3

2

R3

12.4K

R3

12.4K

R2

7.8K

R2

7.8K

C7

0.01uF

C7

0.01uF

C10

0.01uF

C10

0.01uF

R10

5K

R10

5K

1

3

2

Содержание ZNEO Series

Страница 1: ...Zilog Developer Studio II ZDS II Table 1 ZDS II System Requirements Recommended Configuration Minimum Configuration PC running MS Windows XP Professional Pentium III 500 MHz or higher processor 128 MB...

Страница 2: ...sert it into the slot that remains after removing the slide out plate 3 Slide the new plug adapter into the slot until it snaps into place You can leave the adapter slot cover in place and plug in a s...

Страница 3: ...IS RS232 is OUT shunt not installed and jumper J3 DIS IRDA is IN shunt installed For detailed jumper descriptions refer to the Z16F2800100ZCOG ZNEO Series Development Kit User Manual UM0202 2 The deve...

Страница 4: ...t of another Zilog Development Kit the drivers are already present on your system Plug the USB Smart Cable supplied with the ZNEO development kit into an available USB port The USB Smart Cable drivers...

Страница 5: ...USB Smart Cable to the host PC The Found New Hardware wizard is displayed 2 Select Locate and install driver software recommended The User Account Control window is displayed click Continue The Drive...

Страница 6: ...B Zilog Developer Studio II Installation CD Device Drivers USB 5 Click Next and then click Next again after the appropriate driver is found 6 Click Finish to complete the installation Windows 2000 Fol...

Страница 7: ...o II Installation CD Device Drivers USB 5 Click Next and then click Next again after the appropriate driver is found 6 Click Finish to complete the installation Connecting the USB Smart Cable to the T...

Страница 8: ...steps below to open and use the Z16F2800100ZCOG zdsproj sample project This project is designed to compile and download into ZNEO internal Flash Memory and blink the development board LEDs These proc...

Страница 9: ...le menu The Open Project dialog box appears The sample used in the following steps is in the C programming language An assembler version of the Quick Start sample is located in the samples Assembly fo...

Страница 10: ...Click the Rebuild All icon to build the project Wait for the build to complete as indicated by the Build Complete confirmation in the status window at the bottom of the screen see Figure 4 on page 11...

Страница 11: ...O Series of Microcontrollers Development Kit QS005703 0908 Page 11 of 18 9 Click Go to start the program The screen changes as shown in Figure 5 on page 12 Figure 4 ZDS II Build Completed Screen Go Ic...

Страница 12: ...o not blink start over from step 3 on page 9 11 Two position slide Switch S3 controls the order in which the LEDs blink To reverse the sequence of the LEDs and make them blink in the opposite directio...

Страница 13: ...l memory configuration is described in Configuring Memory for Your Program section in the Zilog Developer Studio II ZNEO Series User Manual UM0171 Even though your code may be written for use in exter...

Страница 14: ...ernal or external Flash Memory The procedure is similar for loading the release hex files into internal Flash Memory Follow the steps below to load a release hex file into external Flash Memory 1 Sele...

Страница 15: ...ZNEO development board from the External Flash list 5 The Flash Loader should default to the directory and hex file for the project you built If you do not see hex file z16F2800100zcog hex click the...

Страница 16: ...ick the Rebuild All icon You can now connect to the target and download the code Detailed instructions for using the Flash Loader are provided in the Zilog Developer Studio II ZNEO Series User Manual...

Страница 17: ...utton Verify that the project rebuilds with no errors Verify that the development board is not currently running any code no LEDs should be blinking In ZDS II click the IDE Reset button ZDS II will co...

Страница 18: ...e to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Document Disclaimer 2008 by Zilog Inc All rights reserved Inf...

Страница 19: ...eet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 1 4 Thursday March 02 2006 TOP Rev C Swapped ANA 8 and ANA 9 on MCU page and MDS interface page POWER COMMUNICATIONS POWER COMMUNICATIONS PA4...

Страница 20: ...Monday May 08 2006 Title Size Document Number Rev Date Sheet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 2 4 Monday May 08 2006 Title Size Document Number Rev Date Sheet of 96C0999 001 C Z8...

Страница 21: ...Evaluation Module Schematic B 3 4 Monday May 08 2006 Title Size Document Number Rev Date Sheet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 3 4 Monday May 08 2006 NC NC NC NC NC NC NC NC NC...

Страница 22: ...4E SN74LVC04 U4E SN74LVC04 11 10 14 7 TP1 TP1 1 2 3 S3 EG1218 S3 EG1218 D1 GREEN D1 GREEN 2 1 P2 DB9 Female P2 DB9 Female 5 9 4 8 3 7 2 6 1 C49 10uF C49 10uF C48 0 1uF C48 0 1uF U7C SN74LVC00 U7C SN74...

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