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4. FDC DESCRIPTION (82078)
The 82078 is a true single-chip floppy disk controller for IBM PC/AT and PS/2
architectures. The integrated analog data separator needs no external compensation,
yet allows for a wide motor speed variation with exceptionally low soft error rates. The
microprocessor interface has 100% hardware register compatibility for PC/ATs and
PS/2s. The 16-byte FIFO with programmable thresholds is extremely useful in multiple
master systems or systems with a large amount of bus latency.
The following "82078 Block Diagram" below shows a block diagram of the 82078 floppy
disk controller.
PRECOMP
SERIAL
INTERFACE
LOGIC
WRITE CLK
GENERATOR
FLOPPY
DISK
DRIVE
INTERFACE
LOGIC
HOST
INTER-
FACE
LOGIC
INTERNAL OSC.
DATA RATE
SELECTION
POWER
MANAGEMENT
LOGIC
INPUT
OUTPUT
WRDATA
WE
MEDID0:1
PD
X [1:2]
IDENT0
IDLE
INTERNAL B
U
S
SRA
SRB
DOR
TDR
MSR
DSR
FIFO
DIR
CCR
DATA
SEPARATOR
MICRO-
CONTROLLER
DRVID0:1
DSKCHG
DRV2
WP
TRK0
INDX
DIR
STEP
HDSEL
DENSEL
DS [0:3]
ME [0:3]
IDENT1
VCCF
SEL3V#
RD#
WR#
A[0:2]
DACK#
DRQ
INT
TC
CS#
RESET
DB[0:7]
82078 Block Diagram
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