Xycom XVME-240, Руководство пользователя

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XVME-240 Manual
October, 1984
The DIO module (along with all XYCOM
I/O
modules) features the XYCOM Standard
I/O Architecture. This design has been incorporated in order to provide a simpler and
more consistent method of programming for the entire line of
XYCOM
I/O modules.
The central core of the XYCOM Standard I/O Architecture is the “kernel”. The
DIO
uses a non-intelligent kernel which provides the circuitry required to receive and
generate all of the signals for a VMEbus defined 16-bit "slave”
module. The non-
intelligent kernel has the following features:
l
Control and Address Buffers
l Base Address Decode circuitry
l Interrupt Decoder/Driver
l Control/Status register
l Module Identification Data
l Pass and Fail LED indicators
These features facilitate the operation of the DIO in the following areas:
Base Addressing - The DIO can be addressed at any one of 64 1K
boundaries in the Short I/O Address space.
I/O Interface Block - The DIO occupies a IK block of the Short I/O Address
space called the
module I/O Interface Block. Within this block, in standard
locations, are found: the I/O registers, the module status and control
register, and the module identification data.
Module Status/Control register - This register provides the user with the
hardware means for developing module self-diagnostic software to verify
the module operational status.
In addition, two bits in this register are
used to enable the module interrupt capability and to perform a "soft"
module reset to a default configuration.
Module Identification Data - This facet provides a unique method of
registering module specific information in an ASCII encoded format. This
information can be studied by the system processor on power-up to verify
the system configuration and operational status.
Additional information on the
XYCOM
Standard I/O Architecture can be found in
Appendix A of this manual.
1.4 SPECIFICATIONS
The following is a list of operationa
module.
1 and environmenta specifications for the
DIO
l-3