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Video Scaler v4.0 User Guide www.xilinx.com 95
UG805 March 1, 2011
VDMA1 Configuration
VDMA1 Configuration
VDMA1 is bidirectional, used for reading the original frames from memory, and writing
the scaled frame back to memory.
The system operates using a Genlock mechanism. A second rotational 5-frame buffer is
defined in the external memory. VDMA1 communicates to VDMA2 which frame it is
writing to, using the Genlock bus
vdma_1_XIL_WD_MGENLOCK
.
VDMA1, in the MHS file text below, interfaces with the video scaler via a VDMA read bus
(scaler input) and VDMA write bus (scaler output).
VDMA2 Configuration
VDMA2 is unidirectional, and is configured that way. It is used for reading the scaled
frame from memory in order to display it. It is a Genlock slave to VDMA1.
Video Scaler Configuration
The video scaler is configured as follows:
• single-engine 4:2:2
• 11Hx11V-taps
• 64 phases
• shared YC coefficients
Its core uses a 148.5 MHz derivative of the 74.25 MHz input clock.
MPMC Configuration
The MPMC is configured to have three VFBC ports. Each port includes a FIFO. The FIFOs
are configured to be 2048 pixels in length. This is especially important for VDMA1, which
handles video data to/from the video scaler. The video scaler
arbitrates on a line-by-line
basis . It does this by analyzing the status of the
rd_almost_empty
and
wd_almost_full
flags on the VDMA buses, before reading or writing one line, but never
analyzes these flags once a line-read or line-write operation has commenced. This is
described in detail in the main text of this user guide. The guidelines for this port are
described in the following two sections.
Scaler READ-port
• For the port that feeds data into the video scaler, ensure that there is a FIFO of a size
equal to or greater than the maximum line length anticipated to be scaled by the
scaler
. Ideally, set this to the next power of 2 above the maximum input line length.
For this example, the max line length is 1280, so the FIFO has been set to 2048 pixels.
• For systems like the VFBC, which have a FIXED threshold for the ALMOST
full/empty flags, set this value to the maximum input line-length. This ensures that
the
rd_almost_empty
flag will not be driven low until an entire line of video data
is in the FIFO, ready for the scaler to accept.