Video Scaler v4.0 User Guide
www.xilinx.com
93
UG805 March 1, 2011
Appendix C
System Level Design
Introduction
This appendix provides an example system that includes the video scaler core. Important
system level aspects when designing with the video scaler are highlighted, including:
•
Video scaler usage with the VDMA/VFBC/MPMC or other memory
interface/controller
•
Inclusion of the video scaler in an EDK project
•
Typical usage of video scaler in conjunction with other cores
•
System level distribution of video timing and genlock signals
Example System General Configuration.
The system input and output is expected to be no larger than 720P (1280Hx720V), with a
maximum pixel frequency of 74.25 MHz, with equivalent clocks.
•
MicroBlaze controls scale factors according to user input
•
The system can upscale or downscale
•
When down scaling, the full input image is scaled down and placed in the center of a
black 720P background and displayed
•
When upscaling, the center of the 720P input image is cropped from memory and
upscaled to 720P, and displayed as a full 720P image on the output
•
Operational clock frequencies are derived from the input clock
Figure C-1
shows a typical example of the video scaler in memory mode incorporated into
a larger system. Here are the essential details:
•
The
Multiport Memory Controller (MPMC)
represents the memory access point for
multiple IP blocks.
•
The MPMC ports are configured as
Video Frame Buffer Controllers (VFBC)
, which
allow the user to access data in rectangular fashion, making it simple to store frames
of data, and access portions of any frame. This configuration is useful for cropping an
area in preparation for upscaling (for example). See the
MPMC Data Sheet
for more
information
•
The
Video Direct Memory Access (VDMA)
blocks simplify the VFBC interface, and
act as a SW-controllable processor peripheral. See the
VDMA Data Sheet
for more
information.
•
The
Timebase Controller
is a SW-configurable timing detector and generator block,
which generates timing signals for distribution around the system. See the
Timing
Controller Data Sheet
for more information.
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Страница 74: ...74 www xilinx com Video Scaler v4 0 User Guide UG805 March 1 2011 Appendix A Use Cases...
Страница 92: ...92 www xilinx com Video Scaler v4 0 User Guide UG805 March 1 2011 Appendix B Programmer Guide...
