122 Diagnostics
WAGO I/O SYSTEM 750 XTR
750-333/040-000 FC PROFIBUS G2 12MBd XTR
Manual
Version 1.4.0
MSAC1 connection is closed when the DP data exchange is left. In the event of
cyclic or acyclic connection failures, both communication channels will be closed.
The MSAC2_Initiate service is used to open an acyclic MSAC2 connection. Once
the connection has been established, it will be monitored by the C2 master.
When failures occur, both the master and the slave can close the connection via
MSAC2_Abort. The bus coupler/controller is able to manage one MSAC2
connection.
9.4.1
Data Areas
Addressing the data areas, which can be written with MSAC1/2_Write or read
with MSAC1/2_Read, is done via an index and the module number
(Slot_Number) included in the configuration table. The modules begin at 0, i.e.
the data areas of the bus coupler/controller (basic device unit) can be accessed
via slot number 0.
The value range of the index addressing is between 0 and 254. The existence of
the individual data blocks (indices) depends on the module. The user data length
of a MSAC1/2_Read and MSAC1/2_Write telegram cannot exceed 240 bytes.
However, the actual lengths of the individual data areas depend on the modules
(Index 255 CALL).
Read and write access to index entries
All indices that concern register content of complex I/O modules are read only by
default. Writing register data for purposes of the parameterization of the
I/O module, e.g. the baud rate for the serial interfaces 750-650, 750-651 and
750-653 is only possible for I/O modules with the order number extension
750-???/003-000. In this case, the user-specific registers R32 and R47 are
enabled for write access with password. The write protection on registers R32
–
R47 is removed by writing the value 0x1235 in register R31. Writing any other
value to register R31 restores the write protection.
Acyclic writing of process data from e.g. digital or analog output modules is only
possible with sole access via an MSAC2 connection. When establishing a
MSAC1 connection, the output information from cyclic DP data exchange or the
PFC runtime system is overwritten.
It is important to note that valid write requests in the register structure are also
then confirmed if the write protection feature has not been enabled. In this case,
the data to be written is not accepted by the complex I/O module. Acceptance
only occurs when write protection is reset.
