VXI Technology, Inc.
26
SMP7500 Programming
T
ABLE
3-1:
SMIP
II
R
EGISTER
M
AP
-
A16
OFFSET
WRITE FUNCTION
READ FUNCTION
3E
Trace Advance
Board Busy
3C
Busy Trigger Control
Busy Trigger Control
3A
Trace RAM Control
Trace RAM Control
38
TTL Trigger Polarity
Reserved
36
Open Trigger Select
Reserved
34
Trace ADV Trigger Select
Reserved
32
Trace RAM Address LOW
Trace RAM Address LOW
30
Trace RAM Address HIGH
Trace RAM Address HIGH
2E
Trace RAM End LOW
Trace RAM End LOW
2C
Trace RAM End HIGH
Trace RAM End HIGH
2A
Trace RAM Start LOW
Trace RAM Start LOW
28
Trace RAM Start HIGH
Trace RAM Start HIGH
26
Module 5, 4 Used Address
Reserved
24
Module 3, 2 Used Address
Reserved
22
Module 1, 0 Used Address
Reserved
20
NVM Access Register
NVM Access Register
1E Reserved
Subclass
Register
1C
Interrupt Control
Interrupt Control
1A Reserved
Interrupt
Status
18 Reserved
Reserved
16 Reserved
Reserved
14 Reserved
Reserved
12 Reserved
Reserved
10 Reserved
Reserved
E Reserved
Version
Number
C
Reserved
Serial Number LOW
A
Reserved
Serial Number HIGH
8 Reserved
Reserved
6
Offset Register
Offset Register
4
Control Register
Status Register
2
Reserved
Device Type Register
0
LA Register
ID Register
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