VXI Technology, Inc.
12
SMP7500 Introduction
Regardless of whether the SMP7500 is configured with other SMP7500 modules or with other
SMIP
II
modules, each group of 96 channels is treated as an independent plug-in in the SMIP
II
module and as such, each group has its own FAIL/POWER and ACCESS/ERROR indicators.
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SMP1100
SMP1200
F
IGURE
1-2:
F
RONT
P
ANEL
L
AYOUT
F
EATURES
•
96 Channels, 12 groups of 8 bits. Up to 576 channels in a double-slot C-size card, up to
192 channels in a single C-size card.
•
Group-wise programmable, as an input or an output, through user TTL input or VXI A24/32
registers.
•
Group-wise programmable polarity through VXI A24/32 registers as an active high or low.
•
Input: 0 V to 60 V, V
IN
(high)
≥
2.0 V, V
IN(low)
≤
1.5 V, input impedance
≥
65 k
Ω
.
•
Output: Open collector (N-DMOS), 0 V to 60 V, up to 300 mA continuous with over-voltage
and over-current protection.
•
Data throughput: 5 µs typical system speeds, 200 kilobytes per second (kb/s) using D8 access,
400 kb/s using D16 access.
•
Data Input/Output Clock Sources: For each group, from Front Panel (F/P) clock input, or VXI
Register Writes.
•
Capture clock edge programmable as rising edge or falling edge.
•
Register based data access for fast throughput.
D
ESCRIPTION
The SMP7500 Open Collector Digital I/O module is a high performance I/O module that has been
designed for high voltage, current and data throughput. The instrument uses direct register access
for very high-speed data through-put.
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