
1 VBT-325 Product overview
Piggyback modules
TIM200-PB
STIM200-PB
VDRIVE-PB
VBAT-PB
The VBT-325B/C is equipped with
connectors that allow it to carry piggyback
modules for added functionality or
performance. Below is a short presentation of
the piggyback modules currently available for
the VBT-325.
The TIM200-PB is a 200MHz Timing
Analyzer piggyback module for the VBT-325
for high-speed analysis of the VMEbus
or
P2
bus. The TIM200-PB has a 32K trace buffer
and samples up to 107 signals with 5ns
resolution, and offers full-speed trigger on
any bit or bit combination, including cross-
trigger from the VBT-325. The trigger
pattern can be qualified with a "duration filter", to specify valid pattern as
greater than or less than in the range 5-635ns. Signals sampled are presented as
graphical waveforms with zoom, cursors and timing markers. The TIM200-PB
can be upgraded to a STIM200-PB, see below.
The STIM200-PB is a 200MHz stimuli/pattem generator piggyback module for
the VBT-325. It is essentially a TIM200-PB with firmware that permits its trace
memory to be put in reverse. The STIM200-PB can generate bus cycles on
VME or VSB and has user-defined timing with 5ns edge-to-edge resolution, as
well as, true bus grant and slave handshake. By means of a screen-oriented
pattern editor the user may create any type of cycles and signal sequences.
Cycle templates are also provided that include all VMEbus cycles, including
VME64 and SSBLT 64-bit block cycles.
The VDRIVE-PB is a piggyback module that implements a true VMEbus
Master/Slave and System Controller by means of the industry standard VIC068
chip. From the same user-interface as that of the VBT-325, the user can then
generate any cycle type, perform memory tests, and generate interrupts, IACKs
etc. The slave memory can also be set at user-defined limits, and there is a
programmable DTACK* generator that can give DTACK* at any address with
a user-defined delay.
The
VBAT-PB
is a piggyback module that automatically monitors all VMEbus
traffic, screening the bus for violations of the VME specification. The board's
rule-based parallel trigger elements continuously, and simultaneously, detect
bus timing violations like address not stable while AS* asserted, bus granted to
two masters, etc. Violations are directed to the trigger circuitry and trace
memory of the VBT-325, and the rule violations are explained in plain English.
VMETRO
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User's Manual
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Содержание VBAT-PB
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Страница 125: ...8 Trace examples 110 V B T 3 2 5 User s Manual V M E T R O ...
Страница 144: ...9 VBAT PB VME bus anomaly trigger ITP40 I GND VMETRO V B T 3 2 5 User s Manual 1 2 9 ...
Страница 159: ...1 1Jumper settings 144 V B T 3 2 5 User s Manual V M E T R O ...
Страница 181: ...16 Simulator for PC 166 V B T 3 2 5 User s Manual V M E T R O ...