5.3 Addressing
5.3.1 Overview
To provide specific addressing of the installed peripheral modules,
certain addresses must be allocated in the CPU. At the start-up of the
CPU, this assigns automatically peripheral addresses for digital in-/
output modules starting with 0 and ascending depending on the slot
location.
If no hardware project engineering is available, the CPU stores at the
addressing analog modules to even addresses starting with 256.
5.3.2 Addressing Backplane bus I/O devices
The CPU 315-2AG13 provides an I/O area (address 0 ... 8191) and a
process image of the In- and Outputs (each address 0 ... 255). The
process image stores the signal states of the lower address (0 ... 255)
additionally in a separate memory area.
The process image this divided into two parts:
n
process image to the inputs (PII)
n
process image to the outputs (PIQ)
The process image is updated automatically when a cycle has been
completed.
Maximally 8 modules per row may be configured by the CPU
315-2AG13.
For the project engineering of more than 8 modules you may use line
interface connections. For this you set in the hardware configurator
the module IM 360 from the hardware catalog to slot 3 of your 1. pro-
file rail. Now you may extend your system with up to 3 profile rails by
starting each with an IM 361 from Siemens at slot 3. Considering the
max total current with the CPU 315-2AG13 from VIPA up to 32 mod-
ules may be arranged in a row. Here the installation of the line con-
nections IM 360/361 from Siemens is not required.
You may access the modules with read res. write accesses to the
peripheral bytes or the process image.To define addresses a hard-
ware configuration may be used. For this, click on the properties of
the according module and set the wanted address.
Max. number of plug-
gable modules
Define addresses by
hardware configuration
VIPA System 300S CPU
Deployment CPU 315-2AG13
Addressing > Addressing Backplane bus I/O devices
HB140 | CPU | 315-2AG13 | GB | Rev. 14-40
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