INSTALLATION
Series 642
70/107
Edition 2017-11-24
813316EB
4.9.3
Communication and timing between Master (PLC) and Slave (VAT-Valve)
See chapter: «OUTPUT Buffer» > «PING PONG TX-BIT» and «INPUT Buffer» > «PING PONG RX-BIT».
For visual overview see the diagram below.
F
ie
ld
b
u
s
Fieldbus buffer
Microcontroller
Ping Pong Rx = Ping Pong
Tx inverted
Slave =
VAT-
Valve
PLC
Check if
Ping pong Rx = Ping Pong Tx
inverted
Fieldbus buffer
MASTER
= PLC
Ping PongTx-bit
Ping PongTx-bit
Ping PongTx-bit
Ping Pong Rx-bit
Ping Pong Rx-bit
Ping Pong Rx-bit
output
input
output
input
S
la
v
e
i
n
te
rn
M
a
s
te
r
in
te
rn
Содержание 642 Series
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