User’s Manual
16
3-2. Description of the BIOS Setup Option
Please make clear the means of those option parameters. Improper settings will
cause the system to hang up or perform poorly. Most items are cle arly understood
from the screen prompt. The manufacturer highly recommends that you use the
“Default” settings to avoid any unpredictable results.
3-3. Details of the Chipset Feature Setup
ROM PCI/ISA BIOS (2A5LEU4B)
CMOS SETUP UTILITY
CHIPSET FEATURE SETUP
Bank 0/1 DRAM Timing
: Normal
Bank 2/3 DRAM Timing
: Normal
SDRAM Cycle Length
: 2
DRAM Read Pipeline
: Enabled
Cache Rd+ CPU Wt Pipeline
: Enabled
Cache Timing
: Fast
Video BIOS Cacheable
: Enabled
System BIOS Cacheable
: Enabled
Memory Hole At 15Mb Addr.
: Disabled
AGP Aperture Size
: 128M
ISA Bus CLK : PCICLK/4
OnChip USB : Disabled
DRAM Setting
Chipset settings associate CPU access to dynamic random access memory
(DRAM). The default timing has been carefully chosen and should only be altered
if data is being lost. Such a scenario might well occur if the system had mixed or
different speed DRAM chips. Greater delays may be required to preserve the
integrity of the data held in the slower memory chips.
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