Toshiba TLP411E, Техническое учебное пособие

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6-4
1-3. NTSC Signal Input
NTSC signal is operated in three modes; standard mode to
display a picture with 640 x 480 pixels in the center area of
the screen, enlargement mode to display a picture fully on
the screen and WIDE mode (832 x 480) to display a pic-
ture fully in the horizontal direction.
Among three modes, in the standard and WIDE modes, the
input signal is simply converted to a double speed signal.
In the enlargement mode, the picture on the screen is en-
larged 1.25 times in the vertical direction. This is realized
by reading out one line twice and then three times alter-
nately, though one line is read out two times usually. As for
the precise circuit operation, refer to PLD description. The
enlargement in the horizontal direction is carried out by
changing the sampling number for one line.
In the standard mode, sampling operation is carried out by
832 fH = approx 12.8 MHz clock signal. In the enlarge-
ment mode, 1028 fH = approx. 16.2 MHz, and in WIDE
mode, 1068 fH = approx. 16.8 MHz. The clock signal is
generated in the PLL circuit (1).
In the PLL circuit (2), a clock signal for memory read is
generated. In the standard mode, the clock signal gener-
ated is twice as much as the memory write clock signal (4-
divided clock signal generated in the PLL (1)). And in the
enlargement mode the clock signal generated is 2.5 times.
Fig. 6-3 shows the operation when NTSC signal is input
1-4. PAL/SECAM Signal Input
The vertical effective line number for PAL signal is 575
lines and this displays a picture in 762
x
572 pixels area.
When PAL signal is displayed the enlargement and WIDE
modes are not available. The basic operation is the same as
the NTSC signal standard mode. A clock signal generated
in PLL (1) is activated with 942 fH = approx. 14.7 MHz
and in PLL (2) it is activated with 29.4 MHz. The opera-
tion with the PAL signal is the same as shown in Fig. 6-3
(same as the NTSC standard mode.)
R SIGNAL
IN
G SIGNAL
IN
B SIGNAL
IN
VD
HD
CLAMP A/D (QX16)
CLAMP
BUFFER
BUFFER
BUFFER
A/D (QX17)
CLAMP
CLP PULSE
CLK2
1/4 CLK2 (
Standard, Wide mode)
1/5 CLK2
(Enlargement mode)
CLK2
CLK1
PCLK (=CLK2)
HD (FOR OSD)
HD, VD
1/8 CLK1
1/4 CLK1
CLR
FIOE
WCK (=1/4 CLK1)
WRS, WLRS
1/4 CLK1
INTERNAL
HD
1/3 PCLK, VD
RRS, WLRS
A/D (QX18)
FIELD MEMORY (QX19)
FIELD MEMORY (QX20)
FIELD MEMORY (QX21)
D/A
(QX22)
EPM7032
PLD
(QX41)
CLOCK
DIVIDER
(QX39, QX40)
PLL2
(QX42)
PLL1
(QX38, QX52)
TIMING GENERATOR
FOR LCD PANEL
(QX45)
OSD
(QX42)
TC160G54AF1137
SYG
(QX32)
R SIGNAL
OUT
G SIGNAL
OUT
B SIGNAL
OUT
OSD SIGNALS
(R G B SEL)
TIMING PULSE
FOR
LCD PANEL
BUS SIGNALS
CLK2 = 5/2 WCK (5/8 CLK1) :
Enlargement mode
CLK2 = 2 x WCK (1/2 CLK1) : Standard,
Wide mode
40 - 85 MHz
Fig. 6-3 Operation when Video signal is input