Toshiba TLP411E, Техническое учебное пособие

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7-4
S
SYNC
SEPARATION
PULSE
CONVERSION
6 dB
S
6 dB
6 dB
- 6 dB
6 dB
6 dB
MUTE
I
2
C
BUS
[IB]
I
2
C
Logic
I/O
4
PIP applied : 42Pin
Non-PIP applied : [ ] terminals are deleted
3
10
28
7
12
16
14
18
11
15
8
29
5
13
17
9
31
6
33
28
38
42
36
30
34
32
24
25
27
19
20
21
22
41
40
37
1
2
39
35
Det select
Det in
V1 in
V2 in
TV in
S1 (Y/V) in
S2 (Y/V) in
C1 in
C2 in
Sync out
LS1 in
LS2 in
LV1 in
LV2 in
LTV in
RS1 in
RS2 in
RV1 in
RV2 in
RTV in
Vcc
GND
V out 1
[V out 2]
Y out
YI in
C out
CI in
SCL
SDA
Address
I/O 1(3 value)
I/O 2(3 value)
[I/O 3]
[O 4]
[O 5]
Lout TV
L out
[L out 2]
R out TV
R out 1
[R out 2]
Vcc
GND
26
Fig. 7-3 Internal block diagram of TA1218N