Toshiba MM20E45, Техническое учебное пособие

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By the above countermeasure only, there are troubles still.
When a signal is input in no signal condition micom detects
as existing of signal, and changes pin 14 of DAC ICX001
from 0V to 5V. But due to some time delay, the period that
the circuit operates by false sync signal of (Fig. 2
) is
produced. In this condition, two AFC circuits begins to
operate (Fig. 3
) in one closed loop. In result, two AFC
give interference to each other to make bending and trembling
of picture. To prevent this, false FBP (Fig. 2
g ) with width
of 10 micro sec is produced from pin9 of ICH40. And in no
signal, switching at pins 3 to 5 of ICH27 is done so that this
pulse is supplied to pin 9 of V/C/D IC.
IC501
pin 7
a
ICH40
pin 5 , 11 b
ICH40
pin 7
c
2 S
QH38
Base d
QH38
Collector e
2 S
ICH40
pin 9 f
QH41
Collector
g
10 S
Fig. 2
To Q484 in Fig.1, such signal that Q484 turns on when TV
or Video signal exists, and turns off in no signal, is sent from
pin 14 of DAC ICX001. This is the result of detection of no
signal by micom ICA01. Micom counts pulse output from
pin 10 of sync out of V/C/D IC to detect existence or non of
sync signal, and send data to DAC IC ICX001 via T-Bus line.
When signal exists, Q484 turns on, and ICH27 closes the
switch between pins 15 and 2. Hor/ver sync signal which is
supplied from pin 10 of V/C/D IC, is fed to the base of QH11
via buffer amp QK06. However, because of integral by
RH85 and CH72, hor sync signal is eliminated, and ver sync
signal only appears in the form of positive pulse at collector
of QH11.
On the other hand, Vp pulse is also fed to base of QH11
through QH46, to compose OR circuit. But since the timing
is later than the ver sync signal taken from integral of SYNC
OUT pulse, influence of Vp pulse does not appear and the
said failure of trembling does not happen. When ver sync
signal is lost from SYNC OUT pulse due to radio wave
interference like ghost, the way to choose is to rely on Vp
pulse. Since operation frequency of ver deflection circuit
varies considerably by the noise of SYNC OUT when vacant
channel is selected, d.c. voltage only is connected to pin 1 of
ICH27 in order that Vp pulse only can be applied to base of
QH11. In no signal, Q484 turns off, and switch between pins
15 and 1 of ICH27 closes. Therefore, in no signal, Vp pulse
is used as ver sync signal.
Though Vp pulse is used as sync signal in no signal, timing
of Vp pulse varies also because hor osc circuit and hor
deflection circuit are not synchronized. In no signal, picture
does not appear but On-Screen-Display trembles up and
down in OSD function. For the countermeasure, only in no
signal, added OSC IC ICH08 (LA7860) is synchronized to
the frequency of hor oscillator in V/C/D IC IC501, and by
this way, the oscillator in V/C/D IC and hor deflection circuit
are synchronized each other. Through the above, the timing
of Vp pulse does not vary, and OSD is displayed without
trembling even in no signal. To realize this, QH44, QH38 and
Mono-stable Mutivibrator IC ICH40 (TC4528BP) are used.
Hor output pulse which is output from pin7 of V/C/D IC, is
used as a trigger, and is delayed by 2 µs. (Fig. 2
). Then it
is made differential in CK28 and shaped in QH38, and is
made into false sync signal(Fig.2
) with width of 2 ?s.
In no signal, voltage of pin14 of DAC ICX001 becomes 0V,
and the switch of pin 14 of ICH27 is connected to pin 13. And
the said false sync signal is supplied to ICH08 (LA7860),
and is synchronized to hor oscillator of V/C/D IC.