Toshiba MM20E45, Техническое учебное пособие

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9-13
Fig. 15
Operational waveforms of circuits in IC are shown in Fig.16.
Trigger is set at rear edge of trigger pulse of pin 2, and
capacitor CK07 of pin 7 begins to be charged, then the
voltage gradually increases.
When voltages of pins 6 and 7 rise to be equal to control
voltage of pin 5, internal comparater turns in reverse.
By this operation, charge in capacitor CK07 is rapidly
discharged through transistor inside IC.
Output pulse at pin 3 becomes HIGH level during period of
CK07 charging. FET QH25 of output stage of chopper turns
on in period that this pulse is HIGH. Therefore, to raise
output voltage of chopper, it is necessary that the period of
high level of pulse at pin 3 is made wide. And it will be
understood that this is accomplished by increasing control
voltage at pin 5.
Since pulse at pin 3 is always fallen down to LOW level at
front edge of reset pulse of pin 4, it is surely kept in LOW
level after that, upto rear edge of trigger pulse. It is impossible
that period of high level becomes 100%.
30^16.AI
Pulse of
pin4
Pulse of
pin2
Voltage of
pin5
Voltage of
pin7,6
Output pulse
of pin3
0
0
0
0
V
5
V
5
Fig. 16 Operation waveform
Error Amp
ICK02
1
+12V
RK09
CK07
8 7
6
5
1 2 3
4
ICK01
TA7555P
QK03
QK04
TK01