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6-2
2. THEORY OF OPERATION
2-1 H, V Sync Separation Circuits
Fig. 2 shows a basic sync separation circuit and Fig.3 shows
a composite video signal.
When a composite video signal is applied Fig. 2:
(1) The transistor is forward-biased with a voltage charged
into the coupling capacitor turns on, so, a sync signal
shown in Fig. 4 is developed at point
.
H.Vcc
RS
A
Tr
RB
C
Composite
video signal
Charging
Discharging
Fig. 2
Basic circuit
(2) The transistor is reverse-biased with a voltage charged
into the coupling capacitor C for a period other than the
sync signal period, and becomes non conductive status.
(3) The charging time constant TC and discharging time
constant TD in the basic circuit are given by following
equations.
T
C
= C x (R
S
+ R
D
)
(Note: R
D
= resistance between B – E)
T
D
= C x (R
S
+ R
B
)
(4) If the discharging time constant is set to a considerably
large value compared with the H scanning time, base of
the transistor is set to a negative potential for a long
period. That is, the sync separation transistor is reverse-
biased and becomes non conductive status for the
video signal period, thus only the sync signal is
extracted. The sync signal obtained in this stage is fed
to the H AFC circuit and V integration circuit.
2-2 V Sync Separation Circuit
To separate a V sync signal from the composite sync signal
consisting of V and H sync signals mixed, two stages of
integration circuits are provided inside the IC.
The circuit consists of a differential circuit and a Miller
integration circuit, and has following functions.
(1) Removes H sync signal component.
(2) Maintain stable V sync performance for a tape recorded
with a copy guard.
(3) Stabilized V sync performance under special field
conditions (poor field, ghost, sync depressed, adjacent
channel best).
The V sync signal separated in this stage is processed in a
waveform shape circuit and then used as a reset pulse in the
V division circuit as stated later.
Fig. 3
Composite video signal
Fig. 4
Sync separation output
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