Themis RES - 32XR3, Руководство по установке

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Themis Computer
RES-21XR3 for X8SAX Installation Manual
• Lockstep - The motherboard uses two areas of memory to run the same set of
operations in parallel.
• Sparing - Memory sparing occurs when on-demand inactive memory is auto-
matically activated by the system to temporarily replace failed memory until a
service action can be performed (supported only on 2010 Intel® Core
TM
pro-
cessor family based on the 32nm Intel® microarchitecture.)
3.3.3.7 Demand Scrubbing
Demand Scrubbing is a process that allows the CPU to correct correctable memory
errors found on a memory module. When the CPU or I/O issues a demand-read com-
mand, and the read data from memory turns out to be a correctable error, the error is
corrected and sent to the requestor (the original source). Memory is updated as well.
Select Enabled to use Demand Scrubbing for ECC memory correction. The options
are Enabled and
Disabled .
3.3.3.8 Patrol Scrubbing
Patrol Scrubbing is a process that allows the CPU to correct correctable memory
errors detected on a memory module and send the correction to the requestor (the
original source). When this item is set to Enabled, the North Bridge will read and
write back one cache line every 16K cycles, if there is no delay caused by internal
processing. By using this method, roughly 64 GB of memory behind the North
Bridge will be scrubbed every day. The options are Enabled and
Disabled (default).
3.3.3.9 Throttling - Closed Loop
Throttling improves reliability and reduces power in the processor by automatic
voltage control during processor idle states. Available options are Disabled
and
Enabled (default).
3.3.3.10 HDA Controller
Select Enabled to enable the High-Definition Audio controller. The options are
Enabled and Disabled.
3.3.3.11 Intel VT-d
Select Enabled to enable Intel's Virtualization Technology support for Direct I/O
VT-d by reporting the I/O device assignments to VMM through the DMAR ACPI
Tables. This feature offers fully-protected I/O resource-sharing across the Intel plat-