V
ref
= V
IL
MAX (or V
OL
MAX)
V
ref
= V
IH
MIN (or V
OH
MIN)
V
ref
Transmission Line
4.0 pF
1.85 pF
Z0 = 50
Ω
(see note)
Tester Pin Electronics
Data Sheet Timing Reference Point
Output
Under
Test
42
Ω
3.5 nH
Device Pin
(see note)
80
TMS320C6748
SPRS590G – JUNE 2009 – REVISED JANUARY 2017
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TMS320C6748
Peripheral Information and Electrical Specifications
Copyright © 2009–2017, Texas Instruments Incorporated
6
Peripheral Information and Electrical Specifications
6.1
Parameter Information
6.1.1
Parameter Information Device-Specific Information
A.
The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its
transmission line effects must be taken into account. A transmission line with a delay of 2 ns or longer can be used to
produce the desired transmission line effect. The transmission line is intended as a load only. It is not necessary to
add or subtract the transmission line delay (2 ns or longer) from the data sheet timings.
Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the
device pin and the input signals are driven between 0V and the appropriate IO supply rail for the signal.
Figure 6-1. Test Load Circuit for AC Timing Measurements
The load capacitance value stated is only for characterization and measurement of AC timing signals. This
load capacitance value does not indicate the maximum load the device is capable of driving.
6.1.1.1
Signal Transition Levels
All input and output timing parameters are referenced to V
ref
for both "0" and "1" logic levels.
For 3.3 V I/O, V
ref
= 1.65 V.
For 1.8 V I/O, V
ref
= 0.9 V.
For 1.2 V I/O, V
ref
= 0.6 V.
Figure 6-2. Input and Output Voltage Reference Levels for AC Timing Measurements
All rise and fall transition timing parameters are referenced to V
IL
MAX and V
IH
MIN for input clocks,
V
OL
MAX and V
OH
MIN for output clocks
Figure 6-3. Rise and Fall Transition Time Voltage Reference Levels
