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TMS320C6748
SPRS590G – JUNE 2009 – REVISED JANUARY 2017
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TMS320C6748
Device Configuration
Copyright © 2009–2017, Texas Instruments Incorporated
•
Special case settings for peripherals:
–
Locking of PLL controller settings
–
Default burst sizes for EDMA3 transfer controllers
–
Selection of the source for the eCAP module input capture (including on chip sources)
–
McASP AMUTEIN selection and clearing of AMUTE status for the McASP
–
Control of the reference clock source and other side-band signals for both of the integrated USB
PHYs
–
Clock source selection for EMIFA
–
DDR2 Controller PHY settings
–
SATA PHY power management controls
•
Selects the source of emulation suspend signal (from DSP) of peripherals supporting this function.
Many registers are accessible only by a host (DSP) when it is operating in its privileged mode. (ex. from
the kernel, but not from user space code).
Table 4-1. System Configuration (SYSCFG) Module Register Access
BYTE ADDRESS
ACRONYM
REGISTER DESCRIPTION
REGISTER ACCESS
0x01C1 4000
REVID
Revision Identification Register
—
0x01C1 4008
DIEIDR0
Device Identification Register 0
—
0x01C1 400C
DIEIDR1
Device Identification Register 1
—
0x01C1 4010
DIEIDR2
Device Identification Register 2
—
0x01C1 4014
DIEIDR3
Device Identification Register 3
—
0x01C1 4020
BOOTCFG
Boot Configuration Register
Privileged mode
0x01C1 4038
KICK0R
Kick 0 Register
Privileged mode
0x01C1 403C
KICK1R
Kick 1 Register
Privileged mode
0x01C1 4044
HOST1CFG
Host 1 Configuration Register
—
0x01C1 40E0
IRAWSTAT
Interrupt Raw Status/Set Register
Privileged mode
0x01C1 40E4
IENSTAT
Interrupt Enable Status/Clear Register
Privileged mode
0x01C1 40E8
IENSET
Interrupt Enable Register
Privileged mode
0x01C1 40EC
IENCLR
Interrupt Enable Clear Register
Privileged mode
0x01C1 40F0
EOI
End of Interrupt Register
Privileged mode
0x01C1 40F4
FLTADDRR
Fault Address Register
Privileged mode
0x01C1 40F8
FLTSTAT
Fault Status Register
—
0x01C1 4110
MSTPRI0
Master Priority 0 Registers
Privileged mode
0x01C1 4114
MSTPRI1
Master Priority 1 Registers
Privileged mode
0x01C1 4118
MSTPRI2
Master Priority 2 Registers
Privileged mode
0x01C1 4120
PINMUX0
Pin Multiplexing Control 0 Register
Privileged mode
0x01C1 4124
PINMUX1
Pin Multiplexing Control 1 Register
Privileged mode
0x01C1 4128
PINMUX2
Pin Multiplexing Control 2 Register
Privileged mode
0x01C1 412C
PINMUX3
Pin Multiplexing Control 3 Register
Privileged mode
0x01C1 4130
PINMUX4
Pin Multiplexing Control 4 Register
Privileged mode
0x01C1 4134
PINMUX5
Pin Multiplexing Control 5 Register
Privileged mode
0x01C1 4138
PINMUX6
Pin Multiplexing Control 6 Register
Privileged mode
0x01C1 413C
PINMUX7
Pin Multiplexing Control 7 Register
Privileged mode
0x01C1 4140
PINMUX8
Pin Multiplexing Control 8 Register
Privileged mode
0x01C1 4144
PINMUX9
Pin Multiplexing Control 9 Register
Privileged mode
0x01C1 4148
PINMUX10
Pin Multiplexing Control 10 Register
Privileged mode
0x01C1 414C
PINMUX11
Pin Multiplexing Control 11 Register
Privileged mode
0x01C1 4150
PINMUX12
Pin Multiplexing Control 12 Register
Privileged mode
0x01C1 4154
PINMUX13
Pin Multiplexing Control 13 Register
Privileged mode