Texas Instruments OMAP-L138 C6000, Руководство пользователя

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GP [ ]
as input
n m
2
1
GP [ ]
as input
n m
GP
n m
[ ]
as output
4
3
2
1
255
TMS320C6748
www.ti.com SPRS590G – JUNE 2009 – REVISED JANUARY 2017
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Peripheral Information and Electrical Specifications
Copyright © 2009–2017, Texas Instruments Incorporated
6.32.2 GPIO Peripheral Input/Output Electrical Data/Timing
(1) The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the device
recognize the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to allow the device
enough time to access the GPIO register through the internal bus.
(2) C=SYSCLK4 period in ns.
Table 6-134. Timing Requirements for GPIO Inputs
(1)
(see Figure 6-86 )
NO.
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN MAX
1 t
w(GPIH)
Pulse duration, GP n [ m ] as input high 2C
(1) (2)
ns
2 t
w(GPIL)
Pulse duration, GP n [ m ] as input low 2C
(1) (2)
ns
(1) This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the
GPIO is dependent upon internal bus activity.
(2) C=SYSCLK4 period in ns.
Table 6-135. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs
(see Figure 6-86 )
NO. PARAMETER
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN MAX
3 t
w(GPOH)
Pulse duration, GP n [ m ] as output high 2C
(1) (2)
ns
4 t
w(GPOL)
Pulse duration, GP n [ m ] as output low 2C
(1) (2)
ns
Figure 6-86. GPIO Port Timing
6.32.3 GPIO Peripheral External Interrupts Electrical Data/Timing
(1) The pulse width given is sufficient to generate an interrupt or an EDMA event. However, if a user wants to have the device recognize the
GPIO changes through software polling of the GPIO register, the GPIO duration must be extended to allow the device enough time to
access the GPIO register through the internal bus.
(2) C=SYSCLK4 period in ns.
Table 6-136. Timing Requirements for External Interrupts
(1)
(see Figure 6-87 )
NO.
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN MAX
1 t
w(ILOW)
Width of the external interrupt pulse low 2C
(1) (2)
ns
2 t
w(IHIGH)
Width of the external interrupt pulse high 2C
(1) (2)
ns
Figure 6-87. GPIO External Interrupt Timing