• Programmable FIFO length, including a 1-byte-deep operation providing conventional double-buffered
interface
• FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
• Standard asynchronous communication bits for start, stop, and parity
• Generation and detection of line-breaks
• Fully programmable serial interface characteristics:
– 5, 6, 7, or 8 data bits
– Generation and detection of even, odd, stick, or no-parity bits
– Generation of 1 or 2 stop-bits
• RTS and CTS hardware flow support
• Standard FIFO-level and End-of-Transmission interrupts
• Efficient transfers using µDMA:
– Separate channels for transmit and receive
– Receive single request asserted when data is in the FIFO; burst request asserted at programmed FIFO
level
– Transmit single request asserted when there is space in the FIFO; burst request asserted at programmed
FIFO level
• System clock is used to generate the baud clock.
8.14.5.9 External Flash Interface
The CC3220MODx and CC3220MODAx modules include the Macronix
™
32-Mbit serial Flash. The serial Flash
can be programmed directly using the external Flash interface (pins 13, 14, 15, and 17). Note that during normal
operation, the external Flash interface should remain unconnected.
For timing details of the 32-Mbit Macronix serial Flash, see the
data sheet.
8.14.5.10 SD Host
The CC3220MODx and CC3220MODAx modules provide an interface between a local host (LH), such as an
MCU and an SD memory card, and handles SD transactions with minimal LH intervention.
The SD host does the following:
• Provides SD card access in 1-bit mode
• Deals with SD protocol at the transmission level
• Handles data packing
• Adds cyclic redundancy checks (CRC)
• Start and end bit
• Checks for syntactical correctness
The application interface sends every SD command and either polls for the status of the adapter or waits for
an interrupt request. The result is then sent back to the application interface in case of exceptions or to warn
of end-of-operation. The controller can be configured to generate DMA requests and work with minimum CPU
intervention. Given the nature of integration of this peripheral on the CC3220x platform, TI recommends that
developers use peripheral library APIs to control and operate the block. This section emphasizes understanding
the SD host APIs provided in the peripheral library of the CC3220x Software Development Kit (SDK).
The SD Host features are as follows:
• Full compliance with SD command and response sets, as defined in the SD memory card
– Specifications, v2.0
– Includes high-capacity (size >2 GB) cards HC SD
• Flexible architecture, allowing support for new command structure.
• 1-bit transfer mode specifications for SD cards
• Built-in 1024-byte buffer for read or write
– 512-byte buffer for both transmit and receive
– Each buffer is 32-bits wide by 128-words deep
• 32-bit-wide access bus to maximize bus throughput
• Single interrupt line for multiple interrupt source events
SWRS206E – MARCH 2017 – REVISED MAY 2021
46
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