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EXAMPLE BOARD LAYOUT
54X (
0.81)
(1.27) TYP
(19.048)
9X (
2)
(1.5)
6X (3)
(1.5)
6X (3)
0.05 MIN
ALL AROUND
(25)
(20.5)
(0.65)
TYP
(0.65)
TYP
(
0.2) TYP
VIA
(R0.05)
ALL PADS
(
8.1)
0.05 MIN TYP
(3.724)
(8.05)
(4.326)
QFM - 2.4 mm max height
MON0063A
QUAD FLAT MODULE
4223415/C 06/2019
NOTES: (continued)
3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments
literature number SLUA271 (www.ti.com/lit/slua271).
4. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
LAND PATTERN EXAMPLE
SOLDER MASK DEFINED
SCALE:5X
PATTERN
PKG
SEE DETAIL
1
16
17
27
28
43
44
54
55
57
58
60
63
61
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
9X
(45 X 1)
56
59
62
2
15
29
42
PKG
NO TRACES, VIAS, GND PLANE
OR SILK SCREEN SHOULD BE
LOCATED WITHIN THIS AREA
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SIGNAL PADS DETAIL
EXPOSED METAL