Texas Instruments ADS54J54EVM, Руководство пользователя

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User's Guide
SLAU616A – January 2015 – Revised January 2016
ADS54J54 Evaluation Module
This document outlines the basic steps and functions that are required to ensure the proper operation of
the Texas Instruments (TI) ADS54J54 Evaluation Module (EVM). The EVM includes an ADS54J54EVM, a
cable for connection to an external 5-VDC power supply, and a mini-USB cable. This EVM is designed to
be used with the TI TSW14J56EVM JESD204B capture card using an FMC connector interface or FPGA
development boards, such as the Xilinx KC705 or Altera Arria V. The ADS54J54EVM contains an
ADS54J54 (14-bit) four-channel, 500-MSPS ADC. The EVM also contains a TI LMK04828 clock jitter
cleaner. When used with the TSW14J56EVM, JESD204B standard output data from the EVM is captured
and sent to a host PC for analysis. This guide helps users to quickly evaluate the performance of the
ADS54J54EVM board by capturing and displaying waveforms using the TSW14J56 with the High Speed
Data Converter Pro GUI software. The EVM schematics, BOMs, and layout files are found in the design
package under the ADS54J54EVM tool folder on
www.ti.com .
Contents
1 Introduction
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2
1.1 Overview
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2
1.2 Block Diagram
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2
2 Software Control
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4
2.1 Installation Instructions
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4
2.2 Software Operation
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4
3 Basic Test Setup
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14
3.1 Test Block Diagram
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14
3.2 TSW14J56EVM Setup
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15
3.3 ADS54J54EVM Quick-Start Procedure
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15
List of Figures
1 Block Diagram of the ADS54J54EVM
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2
2 Top-Level Block Diagram Window of the ADS54J54 GUI
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3 ADS54J54 Controls Tab
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4 JESD204B Configuration Tab
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8
5 LMK04828 PLL1 Configuration Tab
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9
6 LMK04828 PLL2 Configuration Tab
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7 LMK04828 Clock Outputs Tab
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11
8 LMK04828 SYSREF and SYNC tab
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12
9 Low Level Controls Tab
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13
10 Test Setup
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14
11 High Speed Data Converter Pro (HSDC Pro) Sample Capture
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17
List of Tables
1 Input and Output Connectors and Jumper Descriptions of the ADS54J54EVM
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3
2 ADS54J54 Controls Tab Descriptions
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6
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1 SLAU616A – January 2015 – Revised January 2016 ADS54J54 Evaluation Module
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