Texas Instruments ADS54J54EVM, Руководство пользователя

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5-V DC
Bench
Supply
PC (Windows 7)
LMK04828
JESD204B
Clock Generator
F
MC
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(Male
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ADS54J54
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v
C
lo
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S
Y
S
RE
F
A
B
S
Y
S
RE
F
SYNCAB
8 TX
SYNCCD
S
Y
S
RE
F
C
D
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ChD
ChC
ChB
ChA
ADS54J54 EVM
Introduction
www.ti.com
1 Introduction
1.1 Overview
The ADS54J54EVM is an evaluation module (EVM) used to evaluate Texas Instruments’ ADS54J54 ADC
and the LMK04828 clock jitter cleaner devices. The ADS54J54 (14-bit) is a four-channel, 500-MSPS ADC
with buffered analog inputs and outputs featuring a JESD204B interface. The EVM has transformer-
coupled analog inputs accommodating a wide range of signal sources and frequencies. The LMK04828
provides an ultra-low-jitter and phase-noise sample clock along with system reference clocks and a device
sample clock for the mating FPGA capture board, for a complete JESD204B subclass 1 clocking solution.
The ADS54J54 and LMK04828 are controlled through an easy-to-use software GUI enabling quick
configuration for a variety of uses.
The TSW14J56EVM connects directly to the ADS54J54EVM. The High Speed Data Converter Pro
software GUI processes the data from the TSW14J56EVM to quickly assess the performance of the
ADS54J54. The FMC output interface connector of the EVM has also been verified to be compatible with
both the Xilinx KC705 and Altera Arria V evaluation platforms.
1.2 Block Diagram
The block diagram for the ADS54J54EVM is shown in Figure 1 . The various inputs, outputs, and jumpers
of the ADS54J54EVM are described in Table 1 .
Figure 1. Block Diagram of the ADS54J54EVM
2 ADS54J54 Evaluation Module SLAU616A – January 2015 – Revised January 2016
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