Texas Instruments ADS54J54EVM, Руководство пользователя

Страница: 12 / 22

Software Control
www.ti.com
2.2.4.4 SYSREF and SYNC Controls
Clicking SYSREF and SYNC opens the LMK04828 SYSREF and SYNC tab, shown in Figure 8 . This tab
has controls specific to the generation of the SYSREF outputs of the LMK04828. Along the top of the tab
are controls that are common to all 7 of the SYSREF outputs, such as the SYSREF divider. Once the
JESD204B link is configured for a specific line rate and all JESD204B parameters such as L, M, F, and K
are chosen, then the SYSREF divider should be set to match the SYSREF rate to the Local MultiFrame
Clock period, or LMFC period. For the default configuration of the ADS54J54 EVM as configured by the
ADS54J54_500M_LMF881 config file, the device is set up for 2 lanes per channel, 1 octet per lane, with a
K value of 32. The resulting SYSREF divider value is 1920 as shown in
Figure 8 , matching the SYSREF
rate to the LMFC rate of the ADS54J54 and TSW14J56 capture card configurations. Along the bottom of
the tab are controls that are specific to each of the 7 SYSREF outputs, such as delay settings.
Figure 8. LMK04828 SYSREF and SYNC tab
12 ADS54J54 Evaluation Module SLAU616A – January 2015 – Revised January 2016
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated