Tektronix 323, Инструкция по эксплуатации

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Circuit Description— Type 323
tion. At that time the Sweep Generator is disabled. The
CRT becomes unblanked and the electron beam moves to
center screen. Signals applied to the EXT TRIG OR HORIZ
INPUT jack pass through the Trigger Input circuit to the
Horizontal Amplifier, where they are amplified, converted
to push-pull, and applied to the CRT horizontal deflection
plates. Vertical deflection operation remains the same as
previously described.
VERTICAL PREAMPLIFIER <$>
Block Diagram Description
The principal sections and controls are shown on the
block diagram which is contained on the Vertical Preampli­
fier schematic diagram page. Signals applied to the VERT
INPUT connector can be AC or DC coupled into the atten­
uator section by the INPUT coupling switch. The position
of the VOLTS/DIV switch determines the amount of attenu­
ation the signal receives to provide the deflection factor
indicated by the switch. One position of the switch allows
selection of a square wave signal from a built-in calibrator
unit to allow checking and calibrating of the oscilloscope
circuitry. Two different calibrator amplitudes are available.
The proper amplitude is automatically selected to present
a 5 division calibration display in both positions of the
X 10 VERT GAIN switch.
The input signal is applied to one half of a dual field
effect transistor (FET) in the Source Follower circuit. The
FET provides an extremely high input impedance, and near­
ly unity gain output. The second half of the FET provides
an offset signal which cancels any thermal or power sup­
ply change effects upon the input FET.
The signal from the Source Follower is applied to the
Paraphase Amplifier circuit where equal but opposite polar­
ity signals are developed to provide a differential signal.
The signal developed in the upper half of the amplifier
eventually drives the cathode-ray tube upper deflection
plate, while that out of the lower half of the amplifier drives
the lower deflection plate. Therefore the terms "upper half"
and “ lower half" identify the two halves of the amplifier
circuitry.
The normal single-ended input to push-pull output gain
factor of the Paraphase Amplifier at Q61-Q71 is approxi­
mately 25, and increases to 250 when the X 10 VERT GAIN
switch is closed. (The deflection factor indicated by the
VOLTS/DIV switch must be divided by 10 to determine the
actual deflection factor whenever X 1 0 VERT GAIN is in
effect.)
The Clamper circuit clamps the Paraphase Amplifier out­
put to a maximum of 0 and a minimum of — 1.2 V. This
limiting of the output aids in reducing the time required
for the limiter to recover from overdriving signals.
The POSITION control injects a push-pull current through
the Clamper and Limiter to the zero-impedance input nodes
of the Buffer Amplifiers Q91 and Q99, decreasing the cur­
rent in one side as
the current increases in the other. The
result is a change in the quiescent (reference) vertical posi­
tion of the trace.
The Limiter (D86-D87, D88-D89) decouples the Buffer Am­
plifier from the Paraphase Amplifier during overdrive con­
ditions. This prevents the Output Amplifier from being driv­
en to a non-linear operating region during overdrive condi­
tions. The Output Amplifier therefore requires a minimum
of overdrive recovery time.
The Buffer Amplifier is an operational amplifier with
unity gain. It provides the low impedance drive to the Ver­
tical Output Amplifier which is necessary for good transient
response.
Vertical Input Circuitry
Refer to the schematic. The Vertical Input Circuitry con­
sists of the VERT INPUT connector (J20), the INPUT Coupling
Switch (SW21), coupling capacitor C20, resistor R21, the
input attenuators and the calibrator.
Input Coupling. With INPUT switch SW21 in AC posi­
tion, C20 blocks the signal DC component while permitting
the AC component to pass to the attenuator and preampli­
fier circuitry. In GND position, the switch connects the
attenuator circuitry to ground to provide a DC reference for
adjusting the trace vertical DC reference position. When
switched to DC, the INPUT switch bypasses C20 and R21,
allowing both the AC and DC signal components to be ap­
plied to the attenuator and preamplifier circuitry.
Vertical Input Attenuators. Eleven basic deflection fac­
tors (VOLTS/DIV) are made available through various com­
binations of five attenuator circuits and a "straight through”
circuit. The combinations can be arrived at by connecting
the attenuators as indicated at each switching postion of
SW25 (VOLTS/DIV).
In the .01 (straight through) position, 1 MO and 47 pF
oscilloscope input impedance is provided by the Preampli­
fier
input cabling and stray capacitance. Attenuators are
designed to maintain this same value of impedance at the
VERT INPUT connector regardless of the attenuator in use.
Since each attenuator has the same input impedance as the
Preamplifier, attenuators can be connected in series and
still maintain the 1 MQ and 47 pF impedance at the VERT
INPUT connector. The total attenuation affecting the sig­
nal is then equal to the product of the attenuation factors
in use.
The attenuators are voltage dividers. DC voltage division
is done solely by the resistors, while AC signals are atten­
uated by resistors, capacitors and stray capacitance at low
frequencies. At high frequencies the attenuation becomes
largely a function of the capacitors and stray capacitance.
Fig. 3-1 shows a simplifed input circuit configuration
for .01, 0.2, or .05 VOLTS/DIV switch settings. Brief de­
scriptions of component functions are included.
Calibrator. The simplified calibrator multivibrator circuit
is shown in Fig. 3-2. Its explanation begins with the assump­
tion that Q1 is conducting and Q9 is cut off. Under this
condition Q1 is saturated and its emitter is at approximately
® i 3 -2