Theory of Operation—2246 1Y and 2246 Mod A Service
B TV TRIG EN:
Switches between the B TV Trigger
signal and the DC measurement signal voltage
(U1106C).
TV FIELD SEL:
Switches the A Trigger between TV
FIELD and TV LINE (U1104A).
MAG:
Controls the X I 0 Magnification function of the
Horizontal Output Preamplifier (U802, Diagram 6).
VERT COMP EN
: Turns on the Vertical Comparator
(U702,
Diagram
2)
during
voltage
self
characterization.
TB CAL:
Switches the tim e-base calibration signal
into the B trigger system during horizontal self
characterization (U1106A ).
BW
FULL B:
Switches between full and limited B
Trigger bandwidth.
BW LIMIT : Switches between full and limited A Trig
ger bandwidth. The BW LIMIT signal has a second
use. As the last bit in Shift Register 1, it is fed back
to the Measurement Processor during diagnostic
checks done on the Shift Registers.
X Y : Switches the range of the horizontal position
signal (HORIZ POS) between that needed for Y-T
display and that needed for X -Y display (U301B,
Diagram 6).
Multiplexer (U1106A) normally provides the Line
Trigger signal picked off from the Power Supply
input. For self characterization (SELF CAL) of the
Time Base, the switch outputs the TB CAL signal
obtained from the Measurement Processor (U2501,
Diagram 8).
TV Trigger Detector
INPUT AMPLIFIER.
The signal at pin 19 of U421A is
applied to pin 3 of U1101A via a low-pass filter
formed by R426, L426, and C426. The filter limits
the bandwidth of the X-AXIS signal to about 5 MHz
for application to the Horizontal Preamplifier (U802,
Diagram 6) and to the TV Trigger Detector circuitry.
Operational amplifier U1101A provides low-pass
gain of the applied composite video signal that
further attenuates the video portion of the signal
relative to the sync pulses. The output signal from
U1101A is applied to the Peak Detectors and the
Sync Comparator.
PEAK DETECTORS.
The peak detectors determine
the positive and negative peaks of the applied com
posite video signal. Those peaks voltages are
applied across a voltage divider circuit used to set
the comparison level (slice level) to one input of a
comparator. That level is such that, when the user
selects the correct sync polarity for the applied sig
nal, the middle of the sync tips is at the threshold
level of the comparator. The output of the com
parator then switches only on the sync tips of the
applied signal. The peak detectors are comple
mentary in that the positive-peak detector tran
sistors (Q1101, Q1102,
and Q1103)
and the
negative-peak detector transistors (Q1104, Q1105,
and Q1106) are complem entary types (PNP-NPN).
Both detectors are driven from the same input
signal; the positive peaks of the video signal forward
bias Q1101, and the negative peaks forward bias
Q1104. The operation of the positive peak detector
is described.
The composite video signal is applied to the emitter
of Q1101. A positive-going signal increases the
current through Q1101, causing the collector voltage
to rise. The rising collector voltage biases on Q1102
harder, and C l 114 charges up rapidly following the
positive-going signal up to its positive peak. When
the input signal starts negative, Q1101 is turned off
immediately by the charge held on C l 114. That
leaves C l 114 holding the positive peak voltage of
the input signal. Em itter-follower Q1103 applies that
peak voltage level to U1104B pin 3 via R1117. R1136
to the -7 .5 V from pin 3 provides a fixed offset to the
signal level. The negative-peak detector does the
same type of operation on the signal to apply the
negative peak voltage to pin 5 of U1104B.
When the sync polarity is selected to match the sync
of the applied video signal (by the user with the A
SLOPE switch), the voltage level at the selected
input of U1104B is at the middle of the sync-tip
voltage. If the wrong polarity is selected, triggering
will take place on the video signal. For signal
generator signals, the effect may not be noticeable,
except for a shift of the trigger point; but if com
posite video signals are being viewed, the display
will be unstable when the wrong polarity is selected.
SYNC COMPARATOR.
The incoming composite
video signal is applied to the plus input (pin 3) of the
Video Sync Comparator (U1102A). The Video Sync
Comparator looks at the signal level on pin 2 and
compares it with the incoming video signal level.
When the incoming level crosses the comparison
threshold, the output of U1102A switches state. That
state change occurs at the mid level of the sync
pulses. The output signal of U1102A (TV LINE) is
applied directly to U1104A pin 2 and U11Q6C pin 1 to
be available for selection for the A and the B Trigger
systems for TV LINE triggering.
FIELD SYNC FILTER.
The filter circuit composed of
R1132,
R1133,
C l 106,
C1107,
and
U1102B
processes
the
output
of
U1102A further to
determine when the vertical field sync signal is
present. The time constant of the filter elements is
such that the line sync pulses between vertical fields
3-15
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