Maintenance— 2230 Service
measure the time between an asynchronous trigger (either
the A or the B Gate) and the acquisition systems master
clock. The timer divides the 50 ns convert clock (CONV)
into 200 time periods.
The CDT diagnostic checks the Clock Delay Timer cir
cuit using two self-triggered acquisitions. Each test
acquisition is started when the microprocessor sets CAL-
TIMER (U4247 pin 2) TRUE and TEST (U4228 pin 10) is
set first LO and then HI. When PREFULL (U4228 pin 2)
goes HI, U4127 pin 4 goes TRUE causing the charge cycle
of the CDT (C4201) to start. The discharge cycle begins
100 to 150 ns later when TRGD goes TRUE forward bias
ing Q4203.
The time that the voltage on C4201 is above the volt
age at U4229 pin 2 (set by R4214, R4215 and R4216) dur
ing the discharge cycle is proportional to the time
difference between U4127 pin 4 going HI and TRGD
(U4226 pin 9) going TRUE. This time is counted by U4230
(at the CONV clock rate) and U4231B. The MSB of the
CDT word (bit 8) is shared with BYTEINT (the hardware
flag signifying that a byte interrupt has occurred). This
shared bit is read by the microprocessor through U3428
pin 8.
If an error is found, one of the following messages is
displayed on the crt:
CDT : TIME-OUT <tb_mode_reg_pattern>
CDT : PRE-DETRIG <tb_mode_reg_pattern>
CDT : uncaled : min = <min_actual>
CDT : uncaled : delta = <delta_actual>
Where:
TIME-OUT is caused by not receiving a ENDREC
Tb_mode_reg_pattern is a 2-digit hexadecimal
value indicating the pattern used in the Time Base
Mode Register during the test acquisition.
PRE-DETRIG is caused by the CDT counter
overflowing (CNTCLR U4231 pin 6).
Tb mode reo pattern is a 2-digit hexadecimal
value indicating the pattern used in the Time Base
Mode Register during the test acquisition.
Min_actual is the value (85.0 to 115.0) read from
U4230 + CDT msb (U3428 pin 8) during a test
acquisition with TEST LO.
Delta_actual is the value (200 to 210) read from
U4230 + CDT msb (U3428 pin 8) during a test
acquisition with TEST HI minus the value of the pre
vious min cycle.
FP_A2D. This test checks the front panel A/D
converter circuitry. A conversion is done on three of the
analog inputs (A CURS, U6106 pin 12, B CURS, U6106
pin 13, and ground, U6108 pin 5). The algebraic sum of A
CURS and B CURS are checked. Their sum should be
between 0x100 and 0x700. Ground is also checked. It
should be between 0 and 5 front panel A/D converter
counts (5 — 1024 of VREF).
During
power-up
this
test
defines
a
variable
(FP_POLLED) that controls how the microprocessor
works with the front panel. If during testing a Ml is not
generated, it is assumed that the front panel will never
generate a Ml and the microprocessor must poll the front
panel to see when to transfer front-panel data.
If an error is found one of the following messages is
displayed on the crt:
NOTE
In firmware version 02, the Gnd message should be
FP_A2D: gnd = <actual> > 5 (greater than only)
FP_A2D : cursor :a= <actual> & b = < actual>
FP__A2D : gnd = <actual> < > 5
FP_A2D : TIME-OUT
Where:
Actual is a 3-digit hexadecimal number representing
the result of a front-panel digitization.
TIME-OUT indicates A/D INT FLAG (U6101D pin 13)
did not occur within 0x800 polls by the micro
processor.
CAL_AIDS. The instrument calibration aids are used to
help calibrate the instrument.
CAL_V_POS. This calibration aid is used to calibrate
the storage position control (see "Adjustment Procedure”).
CAL_CLK_DLY. Clock Delay Timer (CDT) calibration
uses a graphic display. The horizontal position of the
display cross hairs is attached to the min count and the
vertical position is attached to the delta count (see
"Adjustment Procedure”).
NOTE
Only BOX and OUT_PORTS is run by version 01
software.
6-27
Содержание 2230
Страница 12: ...2230 Service X The 2230 Digital Storage Oscilloscope 4998 01 ...
Страница 32: ...Operating Information 2230 Service 4998 04 Figure 2 4 Power and display controls and power on indicator 2 5 ...
Страница 33: ...Operating Information 2230 Service Figure 2 5 Vertical controls and connectors 2 6 ...
Страница 48: ...Operating Information 2230 Service Figure 2 11 X Y Plotter interfacing ...
Страница 56: ...Theory of Operation 2230 Service 4999 01 3 2 Figure 3 1 Simplified block diagram ...
Страница 68: ...Operating Information 2230 Service Figure 2 11 X Y Plotter interfacing ...
Страница 76: ...Theory of Operation 2230 Service 4999 01 3 2 Figure 3 1 Simplified block diagram ...
Страница 82: ...Theory of Operation 2230 Service 510 499 9 02 Figure 3 2 Block diagram of the Channel 1 Attenuator circuit 3 8 ...
Страница 98: ...Theory of Operation 2230 Service 499 9 06 Figure 3 6 Horizontal Amplifier block diagram 3 24 ...
Страница 111: ...Theory of Operation 2230 Service 3 37 Figure 3 9 Acquisition Memory timing ...
Страница 190: ...Maintenance 2230 Service 999 14 Figure 6 3 Isolated kernel timing 6 9 ...
Страница 218: ...Maintenance 2230 Service 4999 37 Figure 6 7 Location of screws and spacers on the Storage circuit board 6 37 ...
Страница 329: ...PUT Figure 9 2 S em ico n d u cto r lea d co n fig u ratio n s ...
Страница 332: ...2230Service CHASSIS MOUNTED PARTS ...
Страница 334: ...A14 CH 1 LOGIC BOARD ...
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Страница 347: ...i n 5 a O Q q o u S a o h UJ s a b c d e f g h j k l m n ...
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Страница 355: ...WAVEFORMS FOR DIAGRAM 5 4999 83 ...
Страница 358: ...I W L U O U rc a 4 2 s ...
Страница 361: ...WAVEFORMS FOR DIAGRAM 6 S 84 ...
Страница 362: ...2230 Service TEST SCOPE TRIGGERED ON U665 PIN 8 FOR WAVEFORMS 31 THROUGH 33 ...
Страница 365: ... I I ...
Страница 366: ...A 1 6 S W E E P R EFEREN CE BOARD FIG 9 17 2230 Service Figure 9 17 A16 Sweep Reference board ...
Страница 369: ... o 0 UJU sa eg aiu c u J in su eg 5 C sis n g e s o N QO ...
Страница 371: ...Static Sensitive Devices See Maintenance Section CM I rv CD o 2230 Service ...
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Страница 388: ...H K L M N 7 8 8 2 2 3 0 INPUT OUTFUT WIRING INTERCONNECT ...
Страница 392: ...W A V E F O R M S F O R D IA G R A M 14 ...
Страница 393: ...2230Service 0 0 d s t 4 9 9 9 9 5 ...
Страница 394: ...2230 Service TEST SCOPE TRIGGERED ON U911 PIN 21 FOR WAVEFORMS 64 THROUGH 69 4999 92 ...
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Страница 397: ...WAVEFORMS FOR DIAGRAM 15 TEST SCOPE TRIGGERED ON U9111 PIN 21 FOR WAVEFORMS 70 THROUGH 77 ...
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Страница 406: ...2230 Service n CD O O i 0 s a f s s o m O F ig u re 9 5 D e ta ile d S to ra g e b lo c k diagram 4999 22 ...
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Страница 415: ...IMF PU TPR A IR TM FQ U I W A V E F O R M SF O RO IA G R A M1 5 W A V E F O R M SF O R i ...
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Страница 419: ...i s 5 0 C C p F 2 CC p 2 a u 4 I s c c O 2 e e o 5 a o 5 i 2 i f 2 E C 52 ...
Страница 421: ...TEST SCOPE TRIGGERED ON U4105 PIN 9 FOR WAVEFORMS 121 AND 122 TEST SCOPE TRIGGERED ON U4227 PIN 10 i 4999 97 ...
Страница 423: ...W A V E F O R M SF O RD IA G R A M1 8 O c n ...
Страница 424: ...Figure 9 22 A11A1 Input Output board ...
Страница 427: ...WAVEFORMS FOR DIAGRAM 19 TEST SCOPE TRIGGERED ON U6103 PIN 1 FOR WAVEFORMS 126 AND 127 4999 98 ...
Страница 430: ...Figure 9 23 A11A2 Vector Generator board ...
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Страница 442: ...WAVEFORMS FOR DIAGRAM 22 4999 78 ...
Страница 443: ...XY PLOTTER BOARD DIAGRAM 22 See Parts List for serial number ranges ...
Страница 444: ... u i o IO U J J i o D U I 1 t ir u j t O 0 X I c a a 3 4 2230 4999 71 REV FE8 1987 XY PLOTTER BOARD 22 ...
Страница 447: ...A21 RS 232 OPTION BOARD Flfi A 9 K 01 01 W M ...
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Страница 452: ...COMPONENT NUMBER EXAMPLE ...
Страница 455: ...r n n i i i i n O T IA ll D A A o n XY PLOTTER BOARD P in A23 OPTION MEMORY BOARD FIG 9 27 A22 GPIB OPTION BOARD ...
Страница 459: ...A16 SWEEP REFERENCE ADJUSTMENT LOCATION ...
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