Theory of Operation— 2230 Service
Table 3-4
Time Base Divider Preload Bits
SEC/DIV
SAVE CLOCK
DIVIDER
Divider DD Bits
Divide
Setting
Frequency
Output
7 6 5 4 3 2 1 0
Ratio
20
ms
2.5 MHz
5 MHz
1 1 1 1 1 1 0 0
2
50
ms
1 MHz
2 MHz
1 1 1 1 1 0 1 1
5
0.1 ms
0.5 MHz
1 MHz
1 1 1 1 1 0 0 0
10
0.2 ms
0.25 MHz
0.5 MHz
1 1 1 1 0 1 0 0
20
0.5 ms
0.1 MHz
0.2 MHz
1 1 1 1 0 0 1 1
50
1 ms
50 kHz
100 kHz
1 1 1 1 0 0 0 0
100
2 ms
25 kHz
50 kHz
1 1 1 0 0 1 0 0
200
5 ms
10 kHz
20 kHz
1 1 1 0 0 0 1 1
500
10 ms
5 kHz
10 kHz
1 1 1 0 0 0 0 0
1,000
20 ms
2.5 kHz
5 kHz
1 1 0 0 0 1 0 0
2,000
50 ms
1 .kHz
2 kHz
1 1 0 0 0 0 1 1
5,000
0.1 s
0.5 kHz
1 kHz
1 1 0 0 0 0 0 0
10,000
0.2 s
0.25 kHz
0.5 kHz
1 0 0 0 0 1 0 0
20,000
0.5 s
0.1 kHz
0.2 kHz
1 0 0 0 0 0 1 1
50,000
1 s
50 Hz
100 Hz
1 0 0 0 0 0 0 0
100,000
2 s
25 Hz
50 Hz
0 0 0 0 0 1 0 0
200,000
5 s
10 Hz
20 Hz
0 0 0 0 0 0 1 1
500,000
set RECINTEN (U4119 pin 12) HI, ENDREC and the
enable are combined at U4120D, making INTR LO gen
erating a maskable interrupt. To clear the interrupt, the
Microprocessor makes ACQENA (U4118A pin 5) LO via
U4119. This makes ENDREC (U4105B) LO and INTR
(U4120D) HI, removing the interrupt.
BYTE INTERRUPT. Byte interrupts are generated each
time a byte pair is acquired in the byte modes of ROLL
and SCAN. To start the acquisition of a byte pair, the
Microprocessor sets BYTEINTEN (U4119 pin 13) HI. After
the acquisition of two bytes, SAVECLK (U4125B pin 9)
goes HI setting U4118B. A HI at pin 9 of U4118B is
inverted by U4120B, generating a LO INTR, the maskable
interrupt, at U4120B pin 4. To clear the interrupt, the
Microprocessor makes TBMODE (U4114D pin 11) LO.
This resets U4118B, removing the interrupt.
TRIGGERED INTERRUPT. Triggered interrupts are gen
erated when triggers occur after first being enabled by the
Microprocessor in a triggered mode with triggers allowed.
The Microprocessor enables the interrupt by setting TRI-
GINTEN (U4119 pin 14) HI. When a trigger occurs, TRIGD
(U4226B pin 9) goes HI. The HI TRIGD and TRIGINTEN
are combined at U4120C, making INTR LO. To clear the
interrupt, the Microprocessor makes TRIGINTEN (U4119
pin 14) LO, removing the interrupt.
T rig g e r M ux
Multiplexer U4227 is driven by the B/A TRIG and CAL-
TIMER signals. The multiplexer selects either the A GATE,
B GATE, or CONV signal to drive the Clock Delay Timer
circuit. The C5NV clock is used by the CALTIMER to
determine the maximum and minimum counts from the
Clock Delay Timer circuit. See Table 3-5 for the switching
logic of the multiplexer. The additional state of the TEST
signal is necessary to determine if a maximum or a
minimum count is to be measured by the Clock Delay
Timer for calibration.
C lo c k D e la y T im e r
The circuitry forming the Clock Delay Timer is used only
during equivalent-time sampling
(20
m s
per division to
0.05 ms per division). The purpose of the timer is to deter
mine the time interval between the trigger event and the
next rising edge of the CONV clock. The Microprocessor
3-42
Содержание 2230
Страница 12: ...2230 Service X The 2230 Digital Storage Oscilloscope 4998 01 ...
Страница 32: ...Operating Information 2230 Service 4998 04 Figure 2 4 Power and display controls and power on indicator 2 5 ...
Страница 33: ...Operating Information 2230 Service Figure 2 5 Vertical controls and connectors 2 6 ...
Страница 48: ...Operating Information 2230 Service Figure 2 11 X Y Plotter interfacing ...
Страница 56: ...Theory of Operation 2230 Service 4999 01 3 2 Figure 3 1 Simplified block diagram ...
Страница 68: ...Operating Information 2230 Service Figure 2 11 X Y Plotter interfacing ...
Страница 76: ...Theory of Operation 2230 Service 4999 01 3 2 Figure 3 1 Simplified block diagram ...
Страница 82: ...Theory of Operation 2230 Service 510 499 9 02 Figure 3 2 Block diagram of the Channel 1 Attenuator circuit 3 8 ...
Страница 98: ...Theory of Operation 2230 Service 499 9 06 Figure 3 6 Horizontal Amplifier block diagram 3 24 ...
Страница 111: ...Theory of Operation 2230 Service 3 37 Figure 3 9 Acquisition Memory timing ...
Страница 190: ...Maintenance 2230 Service 999 14 Figure 6 3 Isolated kernel timing 6 9 ...
Страница 218: ...Maintenance 2230 Service 4999 37 Figure 6 7 Location of screws and spacers on the Storage circuit board 6 37 ...
Страница 329: ...PUT Figure 9 2 S em ico n d u cto r lea d co n fig u ratio n s ...
Страница 332: ...2230Service CHASSIS MOUNTED PARTS ...
Страница 334: ...A14 CH 1 LOGIC BOARD ...
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Страница 344: ...u sr z z o 1 ...
Страница 347: ...i n 5 a O Q q o u S a o h UJ s a b c d e f g h j k l m n ...
Страница 352: ......
Страница 355: ...WAVEFORMS FOR DIAGRAM 5 4999 83 ...
Страница 358: ...I W L U O U rc a 4 2 s ...
Страница 361: ...WAVEFORMS FOR DIAGRAM 6 S 84 ...
Страница 362: ...2230 Service TEST SCOPE TRIGGERED ON U665 PIN 8 FOR WAVEFORMS 31 THROUGH 33 ...
Страница 365: ... I I ...
Страница 366: ...A 1 6 S W E E P R EFEREN CE BOARD FIG 9 17 2230 Service Figure 9 17 A16 Sweep Reference board ...
Страница 369: ... o 0 UJU sa eg aiu c u J in su eg 5 C sis n g e s o N QO ...
Страница 371: ...Static Sensitive Devices See Maintenance Section CM I rv CD o 2230 Service ...
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Страница 384: ... I I c o C u o a 5 r O tD v j If 3 IV if I I ci if 5 3 I ...
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Страница 388: ...H K L M N 7 8 8 2 2 3 0 INPUT OUTFUT WIRING INTERCONNECT ...
Страница 392: ...W A V E F O R M S F O R D IA G R A M 14 ...
Страница 393: ...2230Service 0 0 d s t 4 9 9 9 9 5 ...
Страница 394: ...2230 Service TEST SCOPE TRIGGERED ON U911 PIN 21 FOR WAVEFORMS 64 THROUGH 69 4999 92 ...
Страница 396: ... ...
Страница 397: ...WAVEFORMS FOR DIAGRAM 15 TEST SCOPE TRIGGERED ON U9111 PIN 21 FOR WAVEFORMS 70 THROUGH 77 ...
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Страница 406: ...2230 Service n CD O O i 0 s a f s s o m O F ig u re 9 5 D e ta ile d S to ra g e b lo c k diagram 4999 22 ...
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Страница 415: ...IMF PU TPR A IR TM FQ U I W A V E F O R M SF O RO IA G R A M1 5 W A V E F O R M SF O R i ...
Страница 417: ...4999 9S ...
Страница 419: ...i s 5 0 C C p F 2 CC p 2 a u 4 I s c c O 2 e e o 5 a o 5 i 2 i f 2 E C 52 ...
Страница 421: ...TEST SCOPE TRIGGERED ON U4105 PIN 9 FOR WAVEFORMS 121 AND 122 TEST SCOPE TRIGGERED ON U4227 PIN 10 i 4999 97 ...
Страница 423: ...W A V E F O R M SF O RD IA G R A M1 8 O c n ...
Страница 424: ...Figure 9 22 A11A1 Input Output board ...
Страница 427: ...WAVEFORMS FOR DIAGRAM 19 TEST SCOPE TRIGGERED ON U6103 PIN 1 FOR WAVEFORMS 126 AND 127 4999 98 ...
Страница 430: ...Figure 9 23 A11A2 Vector Generator board ...
Страница 434: ...49 9 9 tOO ...
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Страница 437: ...22 3 0 S ervice W A V E F O R M S F O R D I A G R A M 2 1 m f n h ...
Страница 442: ...WAVEFORMS FOR DIAGRAM 22 4999 78 ...
Страница 443: ...XY PLOTTER BOARD DIAGRAM 22 See Parts List for serial number ranges ...
Страница 444: ... u i o IO U J J i o D U I 1 t ir u j t O 0 X I c a a 3 4 2230 4999 71 REV FE8 1987 XY PLOTTER BOARD 22 ...
Страница 447: ...A21 RS 232 OPTION BOARD Flfi A 9 K 01 01 W M ...
Страница 450: ......
Страница 452: ...COMPONENT NUMBER EXAMPLE ...
Страница 455: ...r n n i i i i n O T IA ll D A A o n XY PLOTTER BOARD P in A23 OPTION MEMORY BOARD FIG 9 27 A22 GPIB OPTION BOARD ...
Страница 459: ...A16 SWEEP REFERENCE ADJUSTMENT LOCATION ...
Страница 467: ...2230 Service ...
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