Sun Microsystems Ultra 5, Руководство по обслуживанию

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C-30 Sun Ultra 5 Service Manual • February 2000
C.3.2 PCI Address Assignments
The following table lists the PCI address assignments.
C.3.2.1 PCI Bus A Address Assignments
PCI bus A has all the PCI slots and the address is programmable by the OpenBoot
Prom (OBP).
C.3.2.2 PCI Bus B Address Assignments
The PCI bus B address assignments are as follows:
■
PCIO ASIC registers
■
Boot PROM
PCIO ASIC Registers
The PCIO ASIC is a PCI client and the address can be reprogrammed by software
during boot only. Therefore, instead of providing absolute addresses for each of the
registers, only offset addresses, relative to a base address, are given.
The PCIO ASIC is a multifunction PCI device and its configuration space has three
base address pointers:
■
Boot PROM
■
EBus2 (function 0)
■
Ethernet (function 1)
TABLE C-13
PCI Address Assignments
Address Range in PCI Address Size PCI Space Addressed Notes
0x8000.0000 - 0xBFFF.FFFF 1 Gbyte Primary PCI DVMA space CPU module DVMA register
(equals 0x30)
0x4000.0000 - 0x7FFF.FFFF 1 Gbyte PCI bus A memory space PCI slots APB ASIC register
(equals 0xc)
0x40.0000 - 0x7f.ffff 4 Mbytes PCI bus A I/O space PCI slots
0x0000.0000 - 0x3FFF.FFFF
0xC000.0000 - 0xFFFF.FFFF 2 Gbytes PCI bus B memory space Onboard PCI bus
APB ASIC B register
(equals 0xc3)
0x00.0000 - 0x3f.FFFF
0xC0.0000 - 0xFF.FFF 8 Mbytes PCI bus B I/O space