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Netra CP3060 Board User’s Guide • April 2009
5.1.4.1
JBus-to-PCI-E Bridge
The JBus-to-PCI-E bridge is a low-cost, high-performance JBus-to-dual-PCI-E host
bridge, similar to the PC-based Northbridge. On the host bus side, the JBus-to-PCI-E
bridge supports a coherent, split-transaction, 128-bit JBus interface. On the I/O side,
the JBus-to-PCI-E bridge supports two 8x-lane, industry-standard PCI-E interfaces.
In addition, the JBus-to-PCI-E bridge supports the following interfaces/functionality
to facilitate a richer system feature set.
JBus Interface
The JBus unit detects which transactions present on JBus are targeted for the
JBus-to-PCI-E bridge, accepts and queues those transactions, and coordinates with
the appropriate destination unit within the JBus-to-PCI-E bridge to which the
address and data are sent. When the UltraSPARC T1 processor is the target, the
converse is true; in this case the JBus unit sends out onto the JBus the transactions
initiated from within the JBus-to-PCI-E bridge (such as from one of the PCI units,
I/O caches, and so on.), and presents them to the UltraSPARC T1 processor.
PCI-Express
PCI-Express (PCI-E) is a high-speed, point-to-point dual simplex chip interconnect.
It is designed as the next-generation system bus interconnect, replacing the aging
PCI bus. PCI-E operates at 2.5 GHz and supports lane widths of x1, x2, x4, x8, x16,
and x32.
PCI-E signaling is accomplished through the use of differential pairs per lane of the
interface. For a 1x link, four individual lines are needed:
TX
+
,
TX
−
,
RX
+,
and
RX
−
.
Electrically, the signaling levels are 1.2 volts.
PCI-E transfers data using packets. Each packet has a header which includes
information about the packet and data payload. The data payloads vary in size from
64 bytes to 4 Kbytes. The maximum packet size supported for the JBus-to-PCI-E
bridge is 512 bytes.
Leaf A PCI-E Interface
The Leaf A 4x PCI-E interface on the JBus-to-PCI-E bridge connects to the Extended
Fabric NIC. The interface meets the PCI-E 1.0a specification and is completely
autonomous from the second PCI-E interface on the JBus-to-PCI-E bridge. (That is,
they are not electrically connected).
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