DocID025151 Rev 2
19/70
UM1668
Hardware layout and configuration
69
2.15 Memories
8 M x 32-bit SDRAM is connected to SDRAM Bank1 of the STM32F439NIH6 FMC
interface.
1 Mbit x 16 SRAM is connected to bank1 NOR/PSRAM2 of the FMC interface and both 8-bit
and 16-bit access is allowed by BLN0 & BLN1 connected to BLE & BHE of SRAM
respectively.
128 Mbit NOR Flash is connected to bank1 NOR/PSRAM1 of the FMC interface. The 16-bit
operation mode is selected by the pull-up resistor connected to BYTE pin of NOR Flash.
Write protection is enabled or disabled by the setting of jumper JP9:
All memory signals are also connected on memory connectors CN11 and CN12 for memory
daughterboards.
Some limitations occur when using other peripherals:
1.
FMC addressing limitation depending on number of trace data buses used
(A18 max for 4-bit ETM to A21 max for 1-bit ETM).
2. NOR Flash addresses limited to A21 when SAI or camera module is used.
In such cases, memory addresses A18 to A21 not connected to FMC are pulled down so
memories can be addressed within a limited address range. If A22 is required, the camera
board should be removed and SAI1_SDA should be tri-stated. AIF1_TRI (address: 0x300)
bit 13 of the W8994 can be used to tri-state ADCDAT1 pin (SAI1_SDA) when it is set to 1.
2.16 Analog
input
The two-pin header CN4, and 10 Kohm potentiometer RV1, are connected to PF10 of the
STM32F439NIH6 as analog input. A low pass filter can be implemented by replacing R27
and C24 with the resistor and capacitor requested by end user's application.
2.17 Camera
module
Connector CN5 (for DCMI signals) on the STM32439I-EVAL evaluation board connects to
the camera module daughterboard MB1066.
DCMI signals are duplicated with other peripherals (SAI, I2S, NOR Flash, MicroSD Card,
Trace, Ethernet).
These peripherals may not function correctly when the camera module is being used.
To avoid SAI1_SDA signal impacting D7, SAI1_SDA should be tri-stated.
Refer to
Section 2.15
to see how to tri-state SAI1_SDA.
Table 12. NOR Flash related jumpers
Jumper Description
JP9
Write protection is enabled when JP9 is fitted while write protection is disabled when JP9 is
not fitted.
Default Setting: Not fitted
JP5
Description of JP5 is in Section 1.6: Audio
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