107/317
5 - Peripherals
5.5.2.3 The TOF flag
The Timer OverFlow flag is a bit in the Timer Status Register. It is set each time the free-run-
ning counter overflows from FFFF to 0000.
It can be cleared under program control by the following sequence:
A read to the TSR register, followed by
A read or write to the CLR register.
Any other sequence does not alter the TOF flag, especially using the ACLR instead of the CLR
register. This is summarized in the diagram below:
05-tof
The timer overflow event is an interrupt source that can be either enabled or disabled by the
TOIE bit of Timer Control Register 1. For this interrupt to be serviced, interrupt requests must
be globally enabled by the I bit of the Condition Code Register:
(TOF : bit #5 of TSR)
Timer overflow flag TOF is set by the
transition FFFFh - 0000h of the 16 bit
free running counter
TOF bit to
be cleared
First step : reading access to TSR
Second step : a read or a write
access to the low byte of the free
running counter (TACLR or TBCLR)
A read access to the low
byte of the alternate free running
counter (TAACLR or TBACLR)
TOF bit not to
be cleared
TOF is cleared
TOF is not modified
A write access to the low byte
of the free running counter
resets the counter to FFFCh
Resetting the TOF bit in the Timer Status Register
Содержание ST7 Series
Страница 1: ...ST7 8 BIT MCU FAMILY USER GUIDE JANUARY 1999 1 ...
Страница 238: ...238 317 8 C Language and the C Compiler 08 Burn bmp Then use the EPROMer programmer software as described in Chapter 7 ...
Страница 289: ...289 317 10 Second Application a Sailing Computer 10 befor Bs Rw Vw VMG AlphaR AlphaV Before the wind ...