RadioProcessor
labeled Flag0..11_Out and Flag12..23_Out. On each IDC header the top row of pins (14-26) are grounds, and
the signals are carried on pins 1-13.
Each pin on an IDC header corresponds to a bit in the flag field of an instruction. The association between
bits and pins is shown in the table below. In the RadioProcessor design, most of the flag bits are used to
select frequency and phase registers. However, these bits still output to the IDC connectors so external
hardware can be used to determine the state of the program.
Table 6:
IDC connector pin outs for boards without AWG capability (firmware 10-4 and older).
Table 7:
IDC connector pin outs for boards with AWG capability (firmware 10-5 and newer)
Note: Some designs may not follow this exact flag partitioning scheme. Please contact SpinCore Technologies for more
information.
2020-10-07
24
Function
N/A
Ground
14-26
N/A
Unused
13
23
12
22
11
21
10
20
9
19
TX phase register select
8
18
7
17
6
16
5
15
4
14
3
13
2
12
1
Bit in
flag word
Pin on
Flag12..23
sin (imaginary channel)
phase register select
cos (real channel)
phase register select
tx_enable
Function
N/A
Ground
14-26
N/A
Unused
13
11
Frequency register select
12
10
11
9
10
8
9
7
trigger_scan
8
6
phase_reset
7
5
Digital outputs
6
4
5
3
4
2
3
1
Digital output BNC1
2
0
Digital output BNC0
1
Bit in flag
word
Pin on
Flag0..11
Function
N/A
Ground
14-26
N/A
Unused
13
23
12
22
11
21
10
20
9
19
TX phase register select
8
18
7
17
6
16
5
15
tx_enable
4
14
Frequency register select
3
13
2
12
1
Bit in
flag word
Pin on
Flag12..23
sin (imaginary channel)
phase register select
cos (real channel)
phase register select
Function
N/A
Ground
14-26
N/A
Unused
13
11
Frequency register select
12
10
trigger_scan
11
9
phase_reset
10
8
Shape period select
9
7
8
6
7
5
Amplitude select
6
4
5
3
Digital output
4
2
Digital output
3
1
Digital output BNC1
2
0
Digital output BNC0
1
Bit in flag
word
Pin on
Flag0..11
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