Sony PCS-1500, Руководство по обслуживанию

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3-35
PCS-1500/1500P
3-2-5. Overall Function of IF-744 Board
[System outline]
The IF-744 board is an ISDN communication interface board of the compact processor (PCS-P150/
P150P), and is installed in the optional interface MA-97 board. The IF-744 board has two BRI ports that
realize the 3 BRIs (6B) connection with the port on the MA-97 board. Call control over the line is
performed by the I-Interface LSI HD81504 (IC100, IC200) and the two externally connected RAMs. The
call control firmware is downloaded from the host to one of the two RAMs. The other RAM is used as
the work area of the I-Interface LSI HD81504. Data (the B-channel data) flows as follows: When a call
connection is established, the received signal is sent to the option interface MA-97 from the I-Interface
LSI HD81504, then is sent to TDM ASIC on the MA-97 board. The transmission signal flows in the
reverse signal path as described above. The IF-744 board consists of the analog line block, the CPU
block, the receive call detection and memory check block and the bus control block.
Functions of the respective circuit blocks are described as follows:
1. Analog line block
The signal of the primary side that is received from the line and the signal of the secondary side that is
transmitted from the I-Interface LSI HD81504 (IC100, IC200) are level-shifted by the respective trans-
formers (T101, T102, T201, T202) and are sent to the secondary side and the primary side respectively.
The EMI filters (FL100, FL200) remove the noise included in the primary side’s signal that is output to
the line.
2. CPU block
The CPU block consists of the I-Interface LSI HD81504 (IC100, IC200) and the two SRAMs. The ISDN
call control firmware is stored in one of the two SRAMs (IC101, IC201) and the other SRAM (IC102,
IC202) is used as the RAM area of the I-Interface LSI HD81504. The firmware is downloaded from the
host flash memory to the RAM that the I-Interface LSI HD81504 (IC100, IC200) uses as a ROM area.
3. Receive call detection and memory check blocks
When data arrives, receive call detection is performed. The receive call interrupt signal is sent to the
TDM ASIC of the MA-97 board where the receive call detection signal is set in the register (IC312).
After the firmware is downloaded, the memory check is performed on the RAM area. The result OK or
NG of the memory check is set in a register. The receive call and the result of memory check can be
confirmed when the host CPU reads the data that is set in the register.
4. Bus control block
The PLD (IC312) has the functions of address decoding, host bus control, the address settings for down-
loading and register. The host bus control function involves separating the local bus that connects the I-
Interface LSI HD81504 (IC100, IC200) with the SRAM when downloading the firmware to the SRAM,
or directly connecting the host bus to the SRAM or returning the connection to the original one. The
downloading address setting function sets the address (A0 to A14) of the SRAM by performing the
address setting twice. The first address setting sets the higher addresses of A14 to A8 and the second
address setting sets the lower addresses of A7 to A0. The bus control block has downloading setting
register and receive call detection/memory check registers.
The block diagram of the IF-744 board is shown in Fig. 3-21.
3-2. Circuit Description of the Respective Boards