PC-UM10M
SL-5500 HARDWARE DESCRIPTION
– 25 –
2-11. SYNCHRONUS BUCK REGULATOR (SP6650)
(1) BLOCK DIAGRAM
(2) PIN CONFIGURATION
(3) PIN DESCRIPTION
V
IN
PV
IN
V
IN
V
IN
V
IN
V
I
OUT
Min
OFF
T
Min
ON
T
REF
REF
REF
REF / 2
REF / 2
C
+
-
C
+
-
C
+
-
C
+
-
C
+
-
FB
SHDN
SHDN
LIM
I
LIM
GND
Ref
Block
/ M
I
LIM
/ M
UVLO
UVLO
TSD
Q
Q
CLR
D
BLON
PGND
LX
1
M
OVERCURRENT
PIN
No.
PIN
NAME
DESCRIPTION
1
PVIN
Input voltage power pin. Inductor charging current
passes through this pin.
2
VIN
Internal supply voltage. Control circuitry powered
from this pin.
3
BLON
Open drain battery low output. VIN below battery
low threshold pulls this node to ground. VIN above
threshold, this node is open.
4
ILIM
Inductor current limit programming pin. Tie pin to
VIN for 0.95A peak inductor current limit. Tie pin to
ground for 0.5A peak inductor current limit. TTL
input threshold.
10
9
8
7
6
2
1
3
4
5
PV
IN
V
IN
I
LIM
BLON
SHDN
FB
LX
GND
PGND
V
OUT
10 Pin MSOP
SP 6650
5
SHDN
Shutdown control input. Tie to VIN for normal oper-
ation, tie to ground for shutdown. TTL input thresh-
old.
6
FB
External feedback network input connection. Con-
nect a resistor from FB to ground and FB to VOUT
to control the output voltage externally. This pin
regulates to the internal bandgap reference volt-
age of 1.25V. Tie FB to ground to use the internal
divider for a preset output voltage of 3.3V.
7
VOUT
Output voltage sense pin. Used for internal feed-
back divider and timing circuit.
8
GND
Internal ground pin. Control circuitry returns cur-
rent to this pin.
9
PGND
Power ground pin. Synchronous rectifier current
returns through this pin.
10
LX
Inductor switching node. Inductor tied between this
pin and the output capacitor to create regulated
output voltage.
PIN
No.
PIN
NAME
DESCRIPTION