No.11S098-03
21
STC-GE33OX/GEC33OX
Users guide Rev. 1.03
3.2.2.3 JTAG
1) This JTAG connection is provided for the debugging procedures of the "User Configurable FPGA" program.
JTAG connector is connected to "User Configurable FPGA".
(Note) The rear panel of the camera masks JTAG connector. Rear panel kit is available from Sentech for
JTAG accessibility.
(Note) Please see
“
User configurable FPGA (XILINX) JTAG accessing instructions
” for more detailed
information.
3.2.2.4 User I/Os
The camera provides total of eight I/O points. Three are designated as inputs and five as outputs. Each I/O
point can be assigned (or connected) to any points in "Sentech FPGA" or "User Configurable FPGA".
Please see table-4 and 2 I/O circuits for more details.
(Note) Input’s assignments in the Sentech FPGA are limited for the functions of “Exposure out” and “Trigger
ready
”.
1) Conceptual I/O connection diagram
Fig. 3 User I/Os diagram
Sentech FPGA
User configurable FPGA (XILINX)
IN x 3
Power/IO
connector
ExposureActive
FrameTriggerWait
Other OUTs
TRG IN
Other 2 IN
OUT x5
IN x3
x5
OUT x5
IN x3
ExposureActive
FrameTriggerWait