V5C Technical Manual
6-4
The BIOS Control Register controls the write enables to both the onboard
FLASH BIOS and the BIOS socket. The register is located at I/O address
2A1H.
Bit 0:
Eight bit SCSI bus termination. 1 = On, 0 = Off. For system operation
with the V5C as the first device in the SCSI chain this bit must be set to On.
Bit 1:
This bit controls the selection of the COM2 serial port mode. 0 = RS-232
and 1 = RS-485.
Bit 2:
Upper 8-bit SCSI Wide Termination control. 1 = On.
Bit 3:
FDOC2k control. 1 = On.
Bit 4:
RS-485 Receive Data Control. 0 = Half Duplex, 1 = Full Duplex. This
control allows the COM2 RTS (Request To Send) signal to prevent transmitted
data from being received during half-duplex operation. This signal must be high
for correct full-duplex operation.
Bit 5:
This bit enables programming the onboard FLASH BIOS. For normal oper-
ation, this bit should be clear so that the onboard BIOS is a read-only device. It
should not be set by user programs.
WARNING: Setting this bit makes the BIOS susceptible to data corruption.
Bit 6:
This bit enables programming of a FLASH ROM in the BIOS socket. For
normal operation, this bit should be clear so that any socketed ROM is a read-
only device. It should not be set by user programs.
WARNING: Setting this bit
makes a FLASH device in the socket suceptable to data corruption.
Bit 7:
This bit controls the location of the chip select line for the bios. Setting
this bit to 1 enables the chip select for the on board flash device, disabling the
socketed chip select line. Clearing this bit enables the socketed flash chip select
line while disabling the on board chip select line.
BIOS Control Register
Figure 6-2
BIOS Control Register (I/O 2A1H)
7 6 5 4 3 2 1 0
BSEL SBWE OBWE FHDU FDOC SCSW
RSX
STRM
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