90
Sirius-PJ1Training
Slide 90
SyncDet Processing
POMM
IC2506
TMP88CM38BF
MCU for CC
IC4703
Buffer
IC4001
SH7670
CPU
IC5202
TLV320DAC32
Audio DAC
IC9201
i.MX515
MM CPU
IC2404
VPP1101
Display Port
Receiver
(with HDCP)
IC2509
UPD64012
Video Decoder
IC2203
Sil9127
HDMI Receiver
(with HDCP)
(with PnP)
IC2003
ISL51002
A/D Converter
RGB 10bit x3
RGB 10bit x3
RGB 10bit x3
RGB 10bit x3
RGB 10bit x3
RGB 8bit x3
R,G,B,Y,I 1bit
CLK,H,V,FIELD
CLK,H,V,DE,FIELD
To REON A PORT
To REON B PORT
To Combine2
To LCD Driver
3-Wire 2
3-Wire 1
CLK,H,V,DE,FIELD
Local BUS
CLK,DE,H,V,FIELD
CLK,DE,H,V,FIELD
MM_P_PWB
CLK,H,V
CLK,H,V,FIELD
CLK,H,V
I2S
I2S
ITU-R BT.656 4:2:2 10bit
I2S
I2C Master1
I2C Master2
I2C
I2C Master3
IC2801
EP3C16F484C8N
SyncDet(FPGA)
SyncDet(IC2801) is FPGA. It will function on start-up by being configured by the
CPU (IC4001).
The digital video output from the A/D Converter (IC2003), HDMI Receiver IC
(IC2203), Video Decoder (IC2509), Display Port Receiver IC (IC2404), and MM
CPU (IC9201) are input to SyncDet in the ratio of 1:1, and the signal from the
terminal selected by the menu of the projector is output to the REON A Port.
When the functions of PIP (Picture in Picture) and PBP (Picture by Picture) are
used, the Video Decoder output is also output to the REON B Port.
When the Closed Caption function is enabled, the captions which are output from
MCU (IC2506) and the video output from the Video Decoder are layered in
SyncDet.
This IC calculates required information from the sync signals and also by reading
from each device via I2C. The CPU reads the information via the Local Bus to
recognizs the signals. After that, each device is controlled by I2C via SyncDet,
and performs adjustment following the result of the signal recognition. However,
adjustment will not be performed for the output from the Multi Media CPU, since
its output signal is fixed.
Also, the CPU performs adjustment by I2C control via SyncDet, when the video
adjustment function is used by the user.
This IC has 2 circuits of 3-wire interfaces, and the CPU is enabled to control the
downstream Combine2 and LCD Driver via SyncDet.
