87
Sirius-PJ1Training
Slide 87
Video Signal Processing
POIO2
IO_PWB
C
CV
BNC_CV
R,G,B,Y,I 1bit
H,V,CLK
H,V,FD,CLK
ITU-R BT.656 10bit
CC_SEL1 CC_SEL2
Y
MAIN_PWB
COMPUTER3 (M1001)
S-VIDEO(M1008)
VIDEO(M1005)
I2C
IC2509
UPD64012
Video Decoder
IC2502
NJM2235V
3ch Video
Switch
IC2501
16Mb SDRAM
IC2507
MM1502
6dB Amp.
IC2506
TMP88CM38BF
MCU for CC
IC2801
EP3C16F484C8N
SyncDet(FPGA)
The VIDEO signal, S-VIDEO signal, and the signal from COMPUTER3 (M1001)
in VIDEO Mode is input to the 3ch Video Switch (IC2502) provided on the
MAIN_PWB via the POIO2 connector. The CPU controlling CC_SEL1 and
CC_SEL2 selects the terminal, and input to Video Decoder (IC2509). However,
the S-VIDEO color signal is directly input to the Video Decoder.
In the Video Decoder, color system recognition, horizontal lock detection, vertical
frequency detection are performed and transmitted to SyncDet (IC2801) via the
I2C-BUS, then stored into a register which is readable by the CPU.
The video signals, Y/C separation of NTSC, 3LINE Y/C separation of PAL using
external SDRAM (IC2510), and Y/C separation of SECAM using BPF&TRAP are
processed.
The video output from the video decoder is ITU-R BT.656 4:2:2 10bit, and input
to SyncDet.
Also, this projector supports closed caption. The video signal is input to the Micro
Control Unit which is customized for the closed caption decoding via 6dB AMP
(IC2507). The decoded signal is synchronized with the sync signal from the
SyncDet and output. Then it is layered on the video outputs.
