SH7262/SH7264 Group
Hardware Design Guide
REJ06B0999-0100 Rev. 1.00
Page 27 of 36
Jun. 30, 2010
8. Endianness
The SH7264 supports big-endian order to store the most significant byte (MSB) at the lowest address 0, and little-
endian order to store the least significant byte (LSB) at the lowest address 0. The default endianness is big-endian after
power-on reset on all areas. The CSn space bus control register (CSnBCR) specifies endian when the target area is not
accessed.
Typical memory, SRAM interface with byte selection can be connected in 8- or 16-bit wide, and SDRAM is connected
in 16-bit wide (fixed). PCMCIA interface can be connected in 8- or 16-bit wide, and MPX-I/O interface can be
connected in 8- or 16-bit wide (fixed), or 8- or 16-bit wide variable, depending on the address to access.
The endianness and data bus width have restrictions per boot mode. NOTE: Since the SH2A is native “big endian”,
most common uses of “little-endian” is in data space to connect to “little-endian” devices such as other processors
through dual-port memory or “little-endian” memory mapped I/O.
Table 11 lists the boot modes and default state by area.
Note that data position and strobe signals corresponding to addresses depend on the byte order, big-endian or little-
endian. WE1 indicates address 0 in big-endian, but WE0 indicates address 0 in little-endian.
IMPORTANT: Since the instruction fetch is mixed with the 32- and 16-bit access, code cannot be allocated to the little-
endian area. Always execute instructions from the big-endian areas, internal or external.
NOTE: Since the SH2A is native “big endian”, most common uses of “little-endian” is in data space to connect to
“little-endian” devices such as other processors through dual-port memory or “little-endian” memory mapped I/O.
Table 11 Boot Mode and Default State by Area
Boot Mode
Item
Area 0
Areas 1 to 6
Data bus width
Fixed to 16-bit wide, which cannot
be modified
Set to 16-bit by default, which
can be modified by program
Endianness
Fixed to big-endian order, which
cannot be modified
Set to big-endian order by
default, which can be modified by
program
0
BSC pins setting
Minimal pins to read ROM, such as address, data bus, CS0#, and
RD# are set automatically. Other pins must be set by program.
Data bus width
Set to 16-bit by default, which can be modified by program
Endianness
Set to big-endian order by default, which can be modified by program
1, 2, 3
BSC pins setting
Set to general-purpose port function as default. To access the external
bus, all required pins must be set by program.
