M30870T2-CPE User’s Manual
4. Hardware Specifications
REJ10J0766-0400 Rev.4.00 February 16, 2006
Page 83 of 102
4.3 Connection Diagram
Figures 4.1, 4.2 and 4.3 show a part of the connection diagram of the M30870T2-CPE. Figures 4.1 and 4.2 show the
connection diagrams using the M30870T-EPBM REV.B and M30870T-EPBM REV.C, respectively. These connection
diagrams mainly show the interface section. The signals not shown in Figures 4.1, 4.2 and 4.3 connect the evaluation MCU
and the user system directly. The circuits not connected to the user system such as the emulator's control system are omitted in
Figures 4.1, 4.2 and 4.3. Table 4.2 shows IC electric characteristics of this product for reference purposes.
Figure 4.1 Connection diagram (when using M30870T-EPBM REV.B) (1/3)
AVcc
Vref
AVss
P85/NMI*
CNVss
BYTE
P55/RDY*
P57/HOLD*
C1
C2
R17
R18
SW1
SW4
143
142
140
24
100
100k
*
R14
100k
*
RESET*
R16
100k
*
R15
100k
*
XIN
*
XOUT
*
*
Use
r sy
stem
IC1
I/O Emulate
MCU
AVcc
Vref
AVss
P85/NMI*
P87/Xcin/Vcont
AVcc
Vcc
AVss
GND
XOUT
NC
*: Connected to the inside of the emulator
IC15
CPU Emulate
MCU
Vcc
P86/Xcout
SW2
18
17
*
P87/Xcin/Vcont
P86/Xcout
P86
NC
VSS
P87
XCIN
VCONT
Xcin
*
XCIN
VCONT
VSS
NC
NC
Xcout
SW3
17
18
Vcc
Vcc
Vcc
XOUT
20
NC
NC
NC
NC
NC
Vref
C3
C4
143
142
140
AVcc
Vref
AVss
Vcc
GND
JP1
Vcc