Radstone PME 68-1B, Руководство пользователя

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Function Codes
The 68000 microprocessor contains 3 function code signals, FC0 to FC2. These indicate
the state of the processor, i.e. USER or SUPERVISOR mode, and the type of cycle
currently being executed.
Table 11 Possible Processor States and Cycle Types
FC2 FC1 FC0 Processor State/Cycle Type
LOW LOW LOW Reserved
LOW LOW HIGH User Data
LOW HIGH LOW User Program
LOW HIGH HIGH Reserved
HIGH LOW LOW Reserved
HIGH LOW HIGH Supervisor Data
HIGH HIGH LOW Supervisor Program
HIGH HIGH HIGH Interrupt Acknowledge
Short I/O Address Modifier Code
An address comparator is used to select a 64k byte range from the 68000’s 16M byte
address space.
The 64k byte range is jumper selectable within the range $100000 to $FFFFFF.
$000000-$100000 are employed by on-board memory and addresses. Refer to Chapter 4.
Bus Error Function
A time-out counter is used to provide an error handling function. The external VMEbus
Error (BERR*) signal is ANDed with the internal signal so that the PME68-1B, when
acting as the VMEbus master, will respond if any device on the bus raises a BERR* or
does not respond within a user specified time of up to 2.5ms . For example, a BERR*
signal could be generated by a dynamic memory using Error Detection and Correction
Logic (EDC) if an uncorrectable error is detected.
If the PME 68-1B is bus master and BERR* becomes active, the CPU aborts the current
cycle and enters an error handling routine. Available time-out settings are:
25
m
s 32
m
s 250
m
s 320
m
s 2.5ms
The default time-out value of 2.5ms can be altered by changing the settings of jumpers.
Refer to Chapter 4 for details.
PME68-1B Manual
Page 41 Issue 5