Smart Module Series
SA800U-WF Hardware Design
SA800U-WF_Hardware_Design 79 / 106
3.22. Audio Interfaces
SA800U-WF provides one SPI interface which is dedicated for the control of WCD934x audio codec, one
2-lane SLIMbus interface dedicated for data transmission between SA800U-WF and WCD934x, three I2S
interfaces which can support TDM function. The following table shows the pin definition.
Table 29: Pin Definition of Audio Interfaces
Pin Name
Pin No.
I/O
Description
Comment
CODEC_RST
J2-90
DO
Codec reset
1.8 V power domain.
CODEC_SPI_CLK
J2-92
DO
SPI clock for codec
CODEC_SPI_MOSI
J2-94
DO
SPI master-out slave-in for codec
CODEC_SPI_CS
J2-96
DO
SPI chip select for codec
CODEC_SPI_MISO
J2-89
DI
SPI master-in salve-out for codec
CODEC_INT1
J2-91
DI
Codec interrupt 1
CODEC_INT2
J2-93
DI
Codec interrupt 2
WCD_CLK
J2-43
DO
WCD clock
SLIMBUS_CLK
J2-51
DO
SLIMbus clock
SLIMBUS_DATA0
J2-47
DIO
SLIMbus data bit 0
SLIMBUS_DATA1
J2-49
DIO
SLIMbus data bit 1
I2S1_WS
J2-79
DO
I2S1 word select
I2S1_MCLK
J2-81
DO
I2S1 master clock
I2S1_SCK
J2-83
DO
I2S1 bit clock
I2S1_DATA1
J2-85
DIO
I2S1 data channel 1
I2S1_DATA0
J2-87
DIO
I2S1 data channel 0
I2S2_WS
J2-55
DO
I2S2 word select
I2S2_SCK
J2-57
DO
I2S2 bit clock
I2S2_DATA0
J2-59
DIO
I2S2 data channel 0
