Quectel Smart Module Series, Проектирование аппаратного обеспечения

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Smart Module Series
SA800U-WF Hardware Design
SA800U-WF_Hardware_Design 29 / 106
CAM2_DVDD_EN J1-110 DO
DVDD enable of
camera 2
CAM3_DVDD_EN J1-128 DO
DVDD enable of
camera 3
CCI0_I2C_SCL J1-142 OD CCI0 I2C clock
1.8 V power
domain.
CCI0_I2C_SDA J1-144 OD CCI0 I2C data
CCI1_I2C_SDA J1-146 OD CCI1 I2C data
CCI1_I2C_SCL J1-148 OD CC1 I2C clock
Keypad Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
PWRKEY J2-5 DI
Turns on/off the
module
V
IL
max = 0.63 V
V
IH
min = 1.17 V
Pulled up to 1.8 V
internally.
Active low.
VOL_UP J2-9 DI Volume up
If unused, keep
this pin open.
VOL_DOWN J2-7 DI Volume down
If unused, keep
this pin open.
HOME_KEY J2-145 DI Home key
If unused, keep
this pin open.
Sensor Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
SSC_I2C1_SDA J2-8 OD
Sensor core I2C1
data
1.8 V power
domain.
SSC_I2C1_SCL J2-10 OD
Sensor core I2C1
clock
SSC_SPI1_CS0 J1-136 DO
Sensor core
SPI1 chip select
0
V
OL
max = 0.45 V
V
OH
min = 1.35 V
SSC_SPI1_CS1 J1-138 DO
Sensor core
SPI1 chip select
1
SSC_SPI1_CS2 J1-140 DO
Sensor core
SPI1 chip select
2
SSC_SPI1_CLK J1-154 DO
Sensor core
SPI1 clock