Smart Module Series
SA800U-WF Hardware Design
SA800U-WF_Hardware_Design 37 / 106
I2C10_SCL
J2-75
OD
I2C10 clock
I2C10_SDA
J2-77
OD
I2C10 data
Other Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics Comment
VCONN_EN
J3-30
DO
VCONN enable
VCONN
J3-29
PI
Power supply for
active cables
CBL_PWR_N
J1-134
DI
Initiates
power-on when
grounded.
DBG_TXD
J2-137
DO
Debug UART
transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power
domain.
DBG_RXD
J2-135
DI
Debug UART
receive
V
IL
max = 0.63 V
V
IH
min = 1.17 V
PMU_GPIO10
J2-147
DIO
General-purpose
input/output
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
OL
max = 0.45 V
V
OH
min = 1.35 V
PMU_GPIO13
J2-149
DIO
General-purpose
input/output
Reserved Pins
Pin Name
Pin No.
Comment
RESERVED
J2-88, J2-138, J3-22, J3-23, J3-24, J3-25, J3-26, J3-27,
J4-1
Keep these pins
open.
