PROFACE PL-5700 Series, Руководство пользователя

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Appendix
App-2
PL-5700 Series User’s Manual
<Extended I/O Bit Mapping>
Descr ip tion Address D7 D6 D5 D4 D3 D2 D1 D0
Status register #16EH R
FAN
NG FAN
NGE N
S EL1 R EG 2 R EG 1
F DD
MODE
B LON R EG O
S tatus regis ter #16EH W
IO
INIT FAN
NGE N
S EL1 R EG 2 R EG 1
F DD
MODE
B LON R EG O
Address #16EH is used by the PL system: do not assign it to other devices.
Bit n ame Des cription
REG0 R ead/Write *1
R EG 1 R ead/Write *1
R EG 2 R ead/Write *1
S EL1 S uper I/O S ELEC T *1
F DD MODE 2MB/1.6MB *1
IO INIT S uper I/O initialization, 1: Normal operation *2
FAN NG EN
1 : F an alarm (IR Q15) enabled,
0 : Dis abled
FAN NG
R ead
only,
1 : F an abnormal,
0 : Normal
B LON
1 : B acklight OF F
0 : B acklight ON
*1 : The PL system uses this bit. Do not assign it to other devices. This bit must be
always “1,” do not write “0” for it.
*2 : You cannot read this bit for the purpose of editing or overwriting data.