Appendices
App-1
PL-5910 Series User Manual
A-1 Hardware Configuration
A-2 Consent Agreement
A.1
Hardware Configuration
Appendices
The following data explains the design of the I/O Map, Memory Map and Interrupt
Map, as well as additional hardware design items including the RAS feature.
A.1.1 I/O Map
*1 This device is not supported by the system, but is reserved as standard.
Depending on the arrangement of any connected Plug-and-Play devices,
these features perform different functions/actions.
Address
AT System Device
System Device
0000H - 001FH
DMA controller (8237)
0020H - 003FH
Interrupt controller (8259A)
0040H - 005FH
System timer (8254)
0060H - 006FH
Keyboard (H8/3332)
0070H - 007FH
Real-time clock, NMI mask
0080H - 009FH
DMA bank register
00A0H - 00BFH
Interrupt controller 2 (8259A)
00C0H - 00DFH
DMA controller 2 (8237)
00F0H - 00FFH
Numeric data processor
01F0H - 01FFH
Hard disk (IDE)
0280H - 028FH
Reserved (System internal use)
0290H - 0297H
Reserved
System Monitor
02A0H - 02BFH
Reserved (System internal use)
02E8H - 02EFH
Reserved
Serial port 4 (COM4)
02F8H - 02FFH
Serial port 2 (COM2): General use
0378H - 037FH
Parallel port
03B0H - 03BBH
Video controller (VGA)
03C0H - 03DFH
Video controller (VGA)
03E0H - 03E7H
Reserved (System internal use)
Serial port 3 (COM3)
03E8H - 03EFH
Reserved
03F0H - 03F7H
Floppy disk controller
03F8H - 03FFH
Serial port 1 (COM1) :General use
0400H - 041FH
Reserved (System internal use)
Содержание PL-5910 Series
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