Phytec phyCORE-P8xC51Mx2, Руководство по оборудованию

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Contents
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PHYTEC Messtechnik GmbH 2005 L-602e_3
Index of Figures
Figure 1: Block Diagram..............................................................................6
Figure 2: View of the phyCORE-P8xC51Mx2 ............................................6
Figure 3: Pinout of the phyCORE-P8xC51Mx2 (Top View) ......................7
Figure 4: Numbered Matrix Overview of the phyCORE-Connector
(Viewed from Above)...................................................................9
Figure 5: Numbering of the Jumper Pads...................................................13
Figure 6: Location of the Jumpers (Top View)..........................................13
Figure 7: Location of the Jumpers (Bottom View) ....................................14
Figure 8: Default Memory Model following a Hardware Reset ...............24
Figure 9: Von Neumann Memory Model...................................................27
Figure 10: Configuration of the I/O Area ....................................................29
Figure 11: Physical Dimensions (not Shown at Scale) ................................39
Figure 12: Modular Development and Expansion Board Concept with
the phyCORE-P8xC51Mx2 ........................................................44
Figure 13: Location of Connectors on the
phyCORE Development Board LD 5V ......................................45
Figure 14: Numbering of Jumper Pads ........................................................46
Figure 15: Location of the Jumpers (View of the Component Side) ...........47
Figure 16: Default Jumper Settings of the
phyCORE Development Board LD 5V with
phyCORE-P8xC51Mx2 ..............................................................47
Figure 17: Connecting the Supply Voltage at X1 ........................................50
Figure 18: Pin Assignment of the DB-9 Socket P1A as RS-232
(Front View) ...............................................................................53
Figure 19: Location of Components at U11 and U12 for
Power Supply to External Subassemblies...................................54
Figure 20: Pin Assignment of the DB-9 Socket P1B (Front View) .............56